1300     EncRcTaskInfo *rc_cfg = &task->rc_task->info;  in vepu510_h265_set_rc_regs()  local
1310     RK_U32 ctu_target_bits_mul_16 = (rc_cfg->bit_target << 4) / (mb_wd32 * mb_h32);  in vepu510_h265_set_rc_regs()
1315         reg_frm->common.enc_pic.pic_qp    = rc_cfg->quality_target;  in vepu510_h265_set_rc_regs()
1316         reg_frm->synt_sli1.sli_qp         = rc_cfg->quality_target;  in vepu510_h265_set_rc_regs()
1317         reg_frm->common.rc_qp.rc_max_qp   = rc_cfg->quality_target;  in vepu510_h265_set_rc_regs()
1318         reg_frm->common.rc_qp.rc_min_qp   = rc_cfg->quality_target;  in vepu510_h265_set_rc_regs()
1327         reg_frm->common.enc_pic.pic_qp      = rc_cfg->quality_target;  in vepu510_h265_set_rc_regs()
1328         reg_frm->synt_sli1.sli_qp           = rc_cfg->quality_target;  in vepu510_h265_set_rc_regs()
1329         reg_frm->common.rc_cfg.rc_en        = 1;  in vepu510_h265_set_rc_regs()
1330         reg_frm->common.rc_cfg.aq_en        = 1;  in vepu510_h265_set_rc_regs()
1331         reg_frm->common.rc_cfg.rc_ctu_num   = mb_wd32;  in vepu510_h265_set_rc_regs()
1333         reg_frm->common.rc_qp.rc_max_qp     = rc_cfg->quality_max;  in vepu510_h265_set_rc_regs()
1334         reg_frm->common.rc_qp.rc_min_qp     = rc_cfg->quality_min;  in vepu510_h265_set_rc_regs()
1384 … reg_rc->roi_qthd0.qpmin_area0 = h265->qpmin_map[0] > 0 ? h265->qpmin_map[0] : rc_cfg->quality_min;  in vepu510_h265_set_rc_regs()
1385 … reg_rc->roi_qthd0.qpmax_area0 = h265->qpmax_map[0] > 0 ? h265->qpmax_map[0] : rc_cfg->quality_max;  in vepu510_h265_set_rc_regs()
1386 … reg_rc->roi_qthd0.qpmin_area1 = h265->qpmin_map[1] > 0 ? h265->qpmin_map[1] : rc_cfg->quality_min;  in vepu510_h265_set_rc_regs()
1387 … reg_rc->roi_qthd0.qpmax_area1 = h265->qpmax_map[1] > 0 ? h265->qpmax_map[1] : rc_cfg->quality_max;  in vepu510_h265_set_rc_regs()
1388 … reg_rc->roi_qthd0.qpmin_area2 = h265->qpmin_map[2] > 0 ? h265->qpmin_map[2] : rc_cfg->quality_min;  in vepu510_h265_set_rc_regs()
1389 … reg_rc->roi_qthd1.qpmax_area2 = h265->qpmax_map[2] > 0 ? h265->qpmax_map[2] : rc_cfg->quality_max;  in vepu510_h265_set_rc_regs()
1390 … reg_rc->roi_qthd1.qpmin_area3 = h265->qpmin_map[3] > 0 ? h265->qpmin_map[3] : rc_cfg->quality_min;  in vepu510_h265_set_rc_regs()
1391 … reg_rc->roi_qthd1.qpmax_area3 = h265->qpmax_map[3] > 0 ? h265->qpmax_map[3] : rc_cfg->quality_max;  in vepu510_h265_set_rc_regs()
1392 … reg_rc->roi_qthd1.qpmin_area4 = h265->qpmin_map[4] > 0 ? h265->qpmin_map[4] : rc_cfg->quality_min;  in vepu510_h265_set_rc_regs()
1393 … reg_rc->roi_qthd1.qpmax_area4 = h265->qpmax_map[4] > 0 ? h265->qpmax_map[4] : rc_cfg->quality_max;  in vepu510_h265_set_rc_regs()
1394 … reg_rc->roi_qthd2.qpmin_area5 = h265->qpmin_map[5] > 0 ? h265->qpmin_map[5] : rc_cfg->quality_min;  in vepu510_h265_set_rc_regs()
1395 … reg_rc->roi_qthd2.qpmax_area5 = h265->qpmax_map[5] > 0 ? h265->qpmax_map[5] : rc_cfg->quality_max;  in vepu510_h265_set_rc_regs()
1396 … reg_rc->roi_qthd2.qpmin_area6 = h265->qpmin_map[6] > 0 ? h265->qpmin_map[6] : rc_cfg->quality_min;  in vepu510_h265_set_rc_regs()
1397 … reg_rc->roi_qthd2.qpmax_area6 = h265->qpmax_map[6] > 0 ? h265->qpmax_map[6] : rc_cfg->quality_max;  in vepu510_h265_set_rc_regs()
1398 … reg_rc->roi_qthd2.qpmin_area7 = h265->qpmin_map[7] > 0 ? h265->qpmin_map[7] : rc_cfg->quality_min;  in vepu510_h265_set_rc_regs()
1399 … reg_rc->roi_qthd3.qpmax_area7 = h265->qpmax_map[7] > 0 ? h265->qpmax_map[7] : rc_cfg->quality_max;  in vepu510_h265_set_rc_regs()