Searched refs:p_reg (Results 1 – 3 of 3) sorted by relevance
| /rockchip-linux_mpp/mpp/hal/rkdec/h264d/ |
| H A D | hal_h264d_vdpu2.c | 43 static MPP_RET set_device_regs(H264dHalCtx_t *p_hal, H264dVdpuRegs_t *p_reg) in set_device_regs() argument 47 p_reg->sw53.dec_fmt_sel = 0; //!< set H264 mode in set_device_regs() 48 p_reg->sw54.dec_out_endian = 1; //!< little endian in set_device_regs() 49 p_reg->sw54.dec_in_endian = 0; //!< big endian in set_device_regs() 50 p_reg->sw54.dec_strendian_e = 1; //!< little endian in set_device_regs() 51 p_reg->sw50.dec_tiled_msb = 0; //!< 0: raster scan 1: tiled in set_device_regs() 52 p_reg->sw56.dec_max_burlen = 16; //!< (0, 4, 8, 16) choice one in set_device_regs() 53 p_reg->sw50.dec_ascmd0_dis = 0; //!< disable in set_device_regs() 54 p_reg->sw50.adv_pref_dis = 0; //!< disable in set_device_regs() 55 p_reg->sw52.adv_pref_thrd = 8; in set_device_regs() [all …]
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| H A D | hal_h264d_vdpu1.c | 687 H264dVdpu1Regs_t *p_reg) in vdpu1_set_device_regs() argument 691 p_reg->SwReg03.sw_dec_mode = 0; /* set H264 mode */ in vdpu1_set_device_regs() 692 p_reg->SwReg02.sw_dec_out_endian = 1; /* little endian */ in vdpu1_set_device_regs() 693 p_reg->SwReg02.sw_dec_in_endian = 0; /* big endian */ in vdpu1_set_device_regs() 694 p_reg->SwReg02.sw_dec_strendian_e = 1; //!< little endian in vdpu1_set_device_regs() 695 p_reg->SwReg02.sw_tiled_mode_msb = 0; /* 0: raster scan 1: tiled */ in vdpu1_set_device_regs() 698 p_reg->SwReg02.sw_dec_max_burst = 16; /* (0, 4, 8, 16) choice one */ in vdpu1_set_device_regs() 699 p_reg->SwReg02.sw_dec_scmd_dis = 0; /* disable */ in vdpu1_set_device_regs() 700 p_reg->SwReg02.sw_dec_adv_pre_dis = 0; /* disable */ in vdpu1_set_device_regs() 701 p_reg->SwReg55.sw_apf_threshold = 8; in vdpu1_set_device_regs() [all …]
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| /rockchip-linux_mpp/mpp/hal/vpu/m2vd/ |
| H A D | hal_m2vd_vdpu2.c | 308 RK_U32 *p_reg = (RK_U32 *)p_regs; in hal_m2vd_vdpu2_gen_regs() local 310 mpp_log("reg[%d] = 0x%08x", j, p_reg[j]); in hal_m2vd_vdpu2_gen_regs() 315 RK_U32 *p_reg = (RK_U32*)p_regs; in hal_m2vd_vdpu2_gen_regs() local 319 fprintf(ctx->fp_reg_in, "[(D)%03d, (X)%03x] %08x\n", k, k, p_reg[k]); in hal_m2vd_vdpu2_gen_regs() 389 RK_U32 *p_reg = (RK_U32*)®_out; in hal_m2vd_vdpu2_wait() local 392 fprintf(ctx->fp_reg_out, "[(D)%03d, (X)%03x] %08x\n", k, k, p_reg[k]); in hal_m2vd_vdpu2_wait()
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