| /rockchip-linux_mpp/mpp/hal/rkdec/vp9d/ |
| H A D | hal_vp9d_vdpu34x.c | 633 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (h + 16) / 16, SZ_4K); in hal_vp9d_vdpu34x_gen_regs() local 638 vp9_hw_regs->common.reg020_fbc_payload_off.payload_st_offset = fbd_offset >> 4; in hal_vp9d_vdpu34x_gen_regs() 688 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (h + 16) / 16, SZ_4K); in hal_vp9d_vdpu34x_gen_regs() local 691 y_virstride = fbd_offset; in hal_vp9d_vdpu34x_gen_regs()
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| H A D | hal_vp9d_vdpu382.c | 643 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (h + 16) / 16, SZ_4K); in hal_vp9d_vdpu382_gen_regs() local 648 vp9_hw_regs->common.reg020_fbc_payload_off.payload_st_offset = fbd_offset >> 4; in hal_vp9d_vdpu382_gen_regs() 698 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (h + 16) / 16, SZ_4K); in hal_vp9d_vdpu382_gen_regs() local 701 y_virstride = fbd_offset; in hal_vp9d_vdpu382_gen_regs()
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| H A D | hal_vp9d_vdpu383.c | 859 RK_U32 fbd_offset; in hal_vp9d_vdpu383_gen_regs() local 863 fbd_offset = vp9_hw_regs->vp9d_paras.reg68_hor_virstride * h * 4; in hal_vp9d_vdpu383_gen_regs() 864 vp9_hw_regs->vp9d_addrs.reg193_fbc_payload_offset = fbd_offset; in hal_vp9d_vdpu383_gen_regs()
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| /rockchip-linux_mpp/mpp/hal/rkdec/avs2d/ |
| H A D | hal_avs2d_vdpu383.c | 384 RK_U32 fbd_offset; in fill_registers() local 388 fbd_offset = regs->avs2d_paras.reg68_hor_virstride * MPP_ALIGN(ver_virstride, 64) * 4; in fill_registers() 389 regs->avs2d_addrs.reg193_fbc_payload_offset = fbd_offset; in fill_registers()
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| H A D | hal_avs2d_rkv.c | 357 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (ver_virstride + 16) / 16, SZ_4K); in fill_registers() local 362 common->reg020_fbc_payload_off.payload_st_offset = fbd_offset >> 4; in fill_registers()
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| H A D | hal_avs2d_vdpu382.c | 413 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (ver_virstride + 16) / 16, SZ_4K); in fill_registers() local 418 common->reg020_fbc_payload_off.payload_st_offset = fbd_offset >> 4; in fill_registers()
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| /rockchip-linux_mpp/mpp/hal/rkdec/h264d/ |
| H A D | hal_h264d_vdpu384a.c | 377 RK_U32 fbd_offset; in set_registers() local 379 fbd_offset = fbc_hdr_stride * MPP_ALIGN(ver_virstride, 64) / 16; in set_registers() 386 regs->h264d_addrs.reg193_dpb_fbc64x4_payload_offset = fbd_offset; in set_registers()
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| H A D | hal_h264d_vdpu383.c | 441 RK_U32 fbd_offset; in set_registers() local 443 fbd_offset = fbc_hdr_stride * MPP_ALIGN(ver_virstride, 64) / 16; in set_registers() 447 regs->h264d_addrs.reg193_fbc_payload_offset = fbd_offset; in set_registers()
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| H A D | hal_h264d_vdpu34x.c | 559 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (ver_virstride + 16) / 16, SZ_4K); in set_registers() local 564 common->reg020_fbc_payload_off.payload_st_offset = fbd_offset >> 4; in set_registers()
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| H A D | hal_h264d_vdpu382.c | 568 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (ver_virstride + 16) / 16, SZ_4K); in set_registers() local 573 common->reg020_fbc_payload_off.payload_st_offset = fbd_offset >> 4; in set_registers()
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| /rockchip-linux_mpp/mpp/hal/rkdec/h265d/ |
| H A D | hal_h265d_vdpu384a.c | 904 RK_U32 fbd_offset; in hal_h265d_vdpu384a_gen_regs() local 911 fbd_offset = fbc_hdr_stride * MPP_ALIGN(ver_virstride, 64) / 16; in hal_h265d_vdpu384a_gen_regs() 912 hw_regs->h265d_addrs.reg193_dpb_fbc64x4_payload_offset = fbd_offset; in hal_h265d_vdpu384a_gen_regs()
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| H A D | hal_h265d_vdpu383.c | 992 RK_U32 fbd_offset; in hal_h265d_vdpu383_gen_regs() local 996 fbd_offset = fbc_hdr_stride * MPP_ALIGN(ver_virstride, 64) / 16; in hal_h265d_vdpu383_gen_regs() 997 hw_regs->h265d_addrs.reg193_fbc_payload_offset = fbd_offset; in hal_h265d_vdpu383_gen_regs()
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| H A D | hal_h265d_vdpu382.c | 748 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (ver_virstride + 64) / 16, SZ_4K); in hal_h265d_vdpu382_gen_regs() local 753 hw_regs->common.reg020_fbc_payload_off.payload_st_offset = fbd_offset >> 4; in hal_h265d_vdpu382_gen_regs()
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| H A D | hal_h265d_vdpu34x.c | 959 RK_U32 fbd_offset = MPP_ALIGN(fbc_hdr_stride * (ver_virstride + 64) / 16, SZ_4K); in hal_h265d_vdpu34x_gen_regs() local 964 hw_regs->common.reg020_fbc_payload_off.payload_st_offset = fbd_offset >> 4; in hal_h265d_vdpu34x_gen_regs()
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| /rockchip-linux_mpp/mpp/hal/rkdec/av1d/ |
| H A D | hal_av1d_vdpu383.c | 2340 RK_U32 fbd_offset; in vdpu383_av1d_gen_regs() local 2346 fbd_offset = regs->av1d_paras.reg68_hor_virstride * h * 4; in vdpu383_av1d_gen_regs() 2347 regs->av1d_addrs.reg193_fbc_payload_offset = fbd_offset; in vdpu383_av1d_gen_regs()
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