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Searched refs:OFFSET_INTERRUPT_REGS (Results 1 – 19 of 19) sorted by relevance

/rockchip-linux_mpp/mpp/hal/rkdec/inc/
H A Dvdpu34x_com.h29 #define OFFSET_INTERRUPT_REGS (224 * sizeof(RK_U32)) macro
H A Dvdpu383_com.h17 #define OFFSET_INTERRUPT_REGS (15 * sizeof(RK_U32)) macro
H A Dvdpu384a_com.h17 #define OFFSET_INTERRUPT_REGS (15 * sizeof(RK_U32)) macro
H A Dvdpu382_com.h29 #define OFFSET_INTERRUPT_REGS (224 * sizeof(RK_U32)) macro
/rockchip-linux_mpp/mpp/hal/rkdec/avs2d/
H A Dhal_avs2d_rkv.c766 …fprintf(fp_reg, "Write reg[%03d] : 0x%08x\n", (RK_U32)(i + OFFSET_INTERRUPT_REGS / sizeof(RK_U32)), in hal_avs2d_rkv_dump_reg_write()
882 rd_cfg.offset = OFFSET_INTERRUPT_REGS; in hal_avs2d_rkv_start()
H A Dhal_avs2d_vdpu382.c832 …fprintf(fp_reg, "Write reg[%03d] : 0x%08x\n", (RK_U32)(i + OFFSET_INTERRUPT_REGS / sizeof(RK_U32)), in hal_avs2d_vdpu382_dump_reg_write()
948 rd_cfg.offset = OFFSET_INTERRUPT_REGS; in hal_avs2d_vdpu382_start()
H A Dhal_avs2d_vdpu383.c774 rd_cfg.offset = OFFSET_INTERRUPT_REGS; in hal_avs2d_vdpu383_start()
/rockchip-linux_mpp/mpp/hal/rkdec/av1d/
H A Dhal_av1d_vdpu383.c128 #define OFFSET_INTERRUPT_REGS (15 * sizeof(RK_U32)) macro
2537 rd_cfg.offset = OFFSET_INTERRUPT_REGS; in vdpu383_av1d_start()
/rockchip-linux_mpp/mpp/hal/rkdec/h264d/
H A Dhal_h264d_vdpu34x.c1088 rd_cfg.offset = OFFSET_INTERRUPT_REGS; in vdpu34x_h264d_start()
H A Dhal_h264d_vdpu384a.c926 rd_cfg.offset = OFFSET_INTERRUPT_REGS; in vdpu384a_h264d_start()
H A Dhal_h264d_vdpu383.c980 rd_cfg.offset = OFFSET_INTERRUPT_REGS; in vdpu383_h264d_start()
H A Dhal_h264d_vdpu382.c1140 rd_cfg.offset = OFFSET_INTERRUPT_REGS; in vdpu382_h264d_start()
/rockchip-linux_mpp/mpp/hal/rkdec/vp9d/
H A Dhal_vp9d_vdpu34x.c957 rd_cfg.offset = OFFSET_INTERRUPT_REGS; in hal_vp9d_vdpu34x_start()
H A Dhal_vp9d_vdpu382.c991 rd_cfg.offset = OFFSET_INTERRUPT_REGS; in hal_vp9d_vdpu382_start()
H A Dhal_vp9d_vdpu383.c1186 rd_cfg.offset = OFFSET_INTERRUPT_REGS; in hal_vp9d_vdpu383_start()
/rockchip-linux_mpp/mpp/hal/rkdec/h265d/
H A Dhal_h265d_vdpu382.c1047 rd_cfg.offset = OFFSET_INTERRUPT_REGS; in hal_h265d_vdpu382_start()
H A Dhal_h265d_vdpu384a.c1248 rd_cfg.offset = OFFSET_INTERRUPT_REGS; in hal_h265d_vdpu384a_start()
H A Dhal_h265d_vdpu34x.c1256 rd_cfg.offset = OFFSET_INTERRUPT_REGS; in hal_h265d_vdpu34x_start()
H A Dhal_h265d_vdpu383.c1310 rd_cfg.offset = OFFSET_INTERRUPT_REGS; in hal_h265d_vdpu383_start()