Searched refs:OFFSET_COMMON_ADDR_REGS (Results 1 – 19 of 19) sorted by relevance
26 #define OFFSET_COMMON_ADDR_REGS (128 * sizeof(RK_U32)) macro
13 #define OFFSET_COMMON_ADDR_REGS (128 * sizeof(RK_U32)) macro
751 …fprintf(fp_reg, "Write reg[%03d] : 0x%08x\n", (RK_U32)(i + OFFSET_COMMON_ADDR_REGS / sizeof(RK_U32… in hal_avs2d_rkv_dump_reg_write()850 wr_cfg.offset = OFFSET_COMMON_ADDR_REGS; in hal_avs2d_rkv_start()
817 …fprintf(fp_reg, "Write reg[%03d] : 0x%08x\n", (RK_U32)(i + OFFSET_COMMON_ADDR_REGS / sizeof(RK_U32… in hal_avs2d_vdpu382_dump_reg_write()916 wr_cfg.offset = OFFSET_COMMON_ADDR_REGS; in hal_avs2d_vdpu382_start()
747 wr_cfg.offset = OFFSET_COMMON_ADDR_REGS; in hal_avs2d_vdpu383_start()
124 #define OFFSET_COMMON_ADDR_REGS (128 * sizeof(RK_U32)) macro2510 wr_cfg.offset = OFFSET_COMMON_ADDR_REGS; in vdpu383_av1d_start()
1047 wr_cfg.offset = OFFSET_COMMON_ADDR_REGS; in vdpu34x_h264d_start()
899 wr_cfg.offset = OFFSET_COMMON_ADDR_REGS; in vdpu384a_h264d_start()
953 wr_cfg.offset = OFFSET_COMMON_ADDR_REGS; in vdpu383_h264d_start()
1101 wr_cfg.offset = OFFSET_COMMON_ADDR_REGS; in vdpu382_h264d_start()
927 wr_cfg.offset = OFFSET_COMMON_ADDR_REGS; in hal_vp9d_vdpu34x_start()
961 wr_cfg.offset = OFFSET_COMMON_ADDR_REGS; in hal_vp9d_vdpu382_start()
1159 wr_cfg.offset = OFFSET_COMMON_ADDR_REGS; in hal_vp9d_vdpu383_start()
1007 wr_cfg.offset = OFFSET_COMMON_ADDR_REGS; in hal_h265d_vdpu382_start()
1221 wr_cfg.offset = OFFSET_COMMON_ADDR_REGS; in hal_h265d_vdpu384a_start()
1214 wr_cfg.offset = OFFSET_COMMON_ADDR_REGS; in hal_h265d_vdpu34x_start()
1283 wr_cfg.offset = OFFSET_COMMON_ADDR_REGS; in hal_h265d_vdpu383_start()