Home
last modified time | relevance | path

Searched refs:x16 (Results 1 – 25 of 50) sorted by relevance

12

/rk3399_rockchip-uboot/configs/
H A Dzynq_zc770_xm011_x16_defconfig7 CONFIG_IDENT_STRING=" Xilinx Zynq ZC770 XM011 x16"
10 CONFIG_DEFAULT_DEVICE_TREE="zynq-zc770-xm011-x16"
/rk3399_rockchip-uboot/board/boundary/nitrogen6x/
H A Dddr-setup.cfg20 * memory bus width: 64 bits x16/x32/x64
22 * memory bus width: 64 bits x16/x32/x64
24 * memory bus width: 32 bits x16/x32
/rk3399_rockchip-uboot/lib/efi_loader/
H A Defi_image_loader.c38 uint16_t *x16 = efi_reloc + offset; in efi_loader_relocate() local
44 *x16 += ((uint32_t)delta) >> 16; in efi_loader_relocate()
47 *x16 += (uint16_t)delta; in efi_loader_relocate()
/rk3399_rockchip-uboot/board/toradex/colibri_imx6/
H A Dddr-setup.cfg21 * memory bus width: 64 bits x16/x32/x64
23 * memory bus width: 64 bits x16/x32/x64
25 * memory bus width: 32 bits x16/x32
/rk3399_rockchip-uboot/board/toradex/apalis_imx6/
H A Dddr-setup.cfg21 * memory bus width: 64 bits x16/x32/x64
23 * memory bus width: 64 bits x16/x32/x64
25 * memory bus width: 32 bits x16/x32
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dfsl-ls2080a.dtsi142 0x16 0x00000000 0x0 0x20000>; /* configuration space */
149 ranges = <0x81000000 0x0 0x00000000 0x16 0x00020000 0x0 0x00010000 /* downstream I/O */
150 0x82000000 0x0 0x40000000 0x16 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
H A Dtegra20-harmony.dts570 MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
571 MATRIX_KEY(0x16, 0x02, KEY_KP6)
572 MATRIX_KEY(0x16, 0x03, KEY_KP5)
573 MATRIX_KEY(0x16, 0x04, KEY_KP3)
574 MATRIX_KEY(0x16, 0x05, KEY_KP2)
575 MATRIX_KEY(0x16, 0x07, KEY_KP0)
H A Dtegra20-seaboard.dts699 MATRIX_KEY(0x16, 0x01, KEY_KPSLASH)
700 MATRIX_KEY(0x16, 0x02, KEY_KP6)
701 MATRIX_KEY(0x16, 0x03, KEY_KP5)
702 MATRIX_KEY(0x16, 0x04, KEY_KP3)
703 MATRIX_KEY(0x16, 0x05, KEY_KP2)
704 MATRIX_KEY(0x16, 0x07, KEY_KP0)
H A Darmada-38x-controlcenterdc.dts366 reg = <0x16>;
470 reg = <0x16>;
/rk3399_rockchip-uboot/arch/arm/cpu/armv8/
H A Dexceptions.S80 stp x15, x16, [sp, #-16]!
148 ldp x15, x16, [sp],#16
H A Dsleep.S35 stp x15, x16, [sp, #80]
77 ldp x15, x16, [sp, #80]
/rk3399_rockchip-uboot/net/
H A DKconfig37 default 0x16 if ARM64
/rk3399_rockchip-uboot/arch/x86/dts/
H A Dchromebook_samus.dts365 * columns 11, density 4096 mb, x16
404 * columns 11, density 8192 mb, x16
443 * columns 11, density 8192 mb, x16
/rk3399_rockchip-uboot/board/LaCie/net2big_v2/
H A Dkwbimage.cfg24 #Dram initalization for SINGLE x16 CL=5 @ 400MHz
62 # bit1-0: 01, Cs0width=x16
/rk3399_rockchip-uboot/board/Seagate/nas220/
H A Dkwbimage.cfg26 #Dram initalization for SINGLE x16 CL=5 @ 400MHz
/rk3399_rockchip-uboot/board/Marvell/guruplug/
H A Dkwbimage.cfg23 #Dram initalization for SINGLE x16 CL=5 @ 400MHz
/rk3399_rockchip-uboot/board/Seagate/dockstar/
H A Dkwbimage.cfg26 #Dram initalization for SINGLE x16 CL=5 @ 400MHz
/rk3399_rockchip-uboot/board/Synology/ds109/
H A Dkwbimage.cfg27 #Dram initalization for SINGLE x16 CL=5 @ 400MHz
/rk3399_rockchip-uboot/board/Marvell/dreamplug/
H A Dkwbimage.cfg24 #Dram initalization for SINGLE x16 CL=5 @ 400MHz
/rk3399_rockchip-uboot/board/Seagate/goflexhome/
H A Dkwbimage.cfg29 #Dram initalization for SINGLE x16 CL=5 @ 400MHz
/rk3399_rockchip-uboot/board/Marvell/sheevaplug/
H A Dkwbimage.cfg23 #Dram initalization for SINGLE x16 CL=5 @ 400MHz
/rk3399_rockchip-uboot/board/LaCie/netspace_v2/
H A Dkwbimage.cfg24 #Dram initalization for SINGLE x16 CL=5 @ 400MHz
H A Dkwbimage-is2.cfg24 #Dram initalization for SINGLE x16 CL=5 @ 400MHz
H A Dkwbimage-ns2l.cfg24 #Dram initalization for SINGLE x16 CL=5 @ 400MHz
/rk3399_rockchip-uboot/board/cloudengines/pogo_e02/
H A Dkwbimage.cfg27 #Dram initalization for SINGLE x16 CL=5 @ 400MHz

12