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Searched refs:tm (Results 1 – 25 of 52) sorted by relevance

123

/rk3399_rockchip-uboot/drivers/rtc/
H A Ddate.c34 int rtc_calc_weekday(struct rtc_time *tm) in rtc_calc_weekday() argument
40 if (tm->tm_year < 1753) in rtc_calc_weekday()
42 last_year = tm->tm_year - 1; in rtc_calc_weekday()
53 if (tm->tm_year % 4 == 0 && in rtc_calc_weekday()
54 ((tm->tm_year % 100 != 0) || (tm->tm_year % 400 == 0)) && in rtc_calc_weekday()
55 tm->tm_mon > 2) { in rtc_calc_weekday()
62 day += last_year * 365 + leaps_to_date + month_offset[tm->tm_mon - 1] + in rtc_calc_weekday()
63 tm->tm_mday; in rtc_calc_weekday()
64 tm->tm_wday = day % 7; in rtc_calc_weekday()
69 int rtc_to_tm(int tim, struct rtc_time *tm) in rtc_to_tm() argument
[all …]
H A Dm41t62.c55 int rtc_get(struct rtc_time *tm) in rtc_get() argument
67 tm->tm_sec = bcd2bin(buf[M41T62_REG_SEC] & 0x7f); in rtc_get()
68 tm->tm_min = bcd2bin(buf[M41T62_REG_MIN] & 0x7f); in rtc_get()
69 tm->tm_hour = bcd2bin(buf[M41T62_REG_HOUR] & 0x3f); in rtc_get()
70 tm->tm_mday = bcd2bin(buf[M41T62_REG_DAY] & 0x3f); in rtc_get()
71 tm->tm_wday = buf[M41T62_REG_WDAY] & 0x07; in rtc_get()
72 tm->tm_mon = bcd2bin(buf[M41T62_REG_MON] & 0x1f); in rtc_get()
76 tm->tm_year = bcd2bin(buf[M41T62_REG_YEAR]) + 100 + 1900; in rtc_get()
81 tm->tm_sec, tm->tm_min, tm->tm_hour, in rtc_get()
82 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); in rtc_get()
[all …]
H A Dx1205.c90 int rtc_get(struct rtc_time *tm) in rtc_get() argument
102 tm->tm_sec = bcd2bin(buf[CCR_SEC]); in rtc_get()
103 tm->tm_min = bcd2bin(buf[CCR_MIN]); in rtc_get()
104 tm->tm_hour = bcd2bin(buf[CCR_HOUR] & 0x3F); /* hr is 0-23 */ in rtc_get()
105 tm->tm_mday = bcd2bin(buf[CCR_MDAY]); in rtc_get()
106 tm->tm_mon = bcd2bin(buf[CCR_MONTH]); /* mon is 0-11 */ in rtc_get()
107 tm->tm_year = bcd2bin(buf[CCR_YEAR]) in rtc_get()
109 tm->tm_wday = buf[CCR_WDAY]; in rtc_get()
114 tm->tm_sec, tm->tm_min, tm->tm_hour, in rtc_get()
115 tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday); in rtc_get()
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H A Dpcf2127.c25 static int pcf2127_rtc_set(struct udevice *dev, const struct rtc_time *tm) in pcf2127_rtc_set() argument
34 buf[i++] = bin2bcd(tm->tm_sec); in pcf2127_rtc_set()
35 buf[i++] = bin2bcd(tm->tm_min); in pcf2127_rtc_set()
36 buf[i++] = bin2bcd(tm->tm_hour); in pcf2127_rtc_set()
37 buf[i++] = bin2bcd(tm->tm_mday); in pcf2127_rtc_set()
38 buf[i++] = tm->tm_wday & 0x07; in pcf2127_rtc_set()
41 buf[i++] = bin2bcd(tm->tm_mon + 1); in pcf2127_rtc_set()
44 buf[i++] = bin2bcd(tm->tm_year % 100); in pcf2127_rtc_set()
52 static int pcf2127_rtc_get(struct udevice *dev, struct rtc_time *tm) in pcf2127_rtc_get() argument
67 tm->tm_sec = bcd2bin(buf[PCF2127_REG_SC] & 0x7F); in pcf2127_rtc_get()
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H A Dm41t94.c36 int rtc_set(struct rtc_time *tm) in rtc_set() argument
51 buf[M41T94_REG_SECONDS] = bin2bcd(tm->tm_sec); in rtc_set()
52 buf[M41T94_REG_MINUTES] = bin2bcd(tm->tm_min); in rtc_set()
53 buf[M41T94_REG_HOURS] = bin2bcd(tm->tm_hour); in rtc_set()
54 buf[M41T94_REG_WDAY] = bin2bcd(tm->tm_wday + 1); in rtc_set()
55 buf[M41T94_REG_DAY] = bin2bcd(tm->tm_mday); in rtc_set()
56 buf[M41T94_REG_MONTH] = bin2bcd(tm->tm_mon + 1); in rtc_set()
59 if (tm->tm_year >= 100) in rtc_set()
61 buf[M41T94_REG_YEAR] = bin2bcd(tm->tm_year % 100); in rtc_set()
68 int rtc_get(struct rtc_time *tm) in rtc_get() argument
[all …]
H A Dds1307.c230 static int ds1307_rtc_set(struct udevice *dev, const struct rtc_time *tm) in ds1307_rtc_set() argument
237 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, in ds1307_rtc_set()
238 tm->tm_hour, tm->tm_min, tm->tm_sec); in ds1307_rtc_set()
240 if (tm->tm_year < 1970 || tm->tm_year > 2069) in ds1307_rtc_set()
243 buf[RTC_YR_REG_ADDR] = bin2bcd(tm->tm_year % 100); in ds1307_rtc_set()
244 buf[RTC_MON_REG_ADDR] = bin2bcd(tm->tm_mon); in ds1307_rtc_set()
245 buf[RTC_DAY_REG_ADDR] = bin2bcd(tm->tm_wday + 1); in ds1307_rtc_set()
246 buf[RTC_DATE_REG_ADDR] = bin2bcd(tm->tm_mday); in ds1307_rtc_set()
247 buf[RTC_HR_REG_ADDR] = bin2bcd(tm->tm_hour); in ds1307_rtc_set()
248 buf[RTC_MIN_REG_ADDR] = bin2bcd(tm->tm_min); in ds1307_rtc_set()
[all …]
H A Dds1374.c85 int rtc_get (struct rtc_time *tm){ in rtc_get() argument
121 rtc_to_tm(time1, tm); /* To Gregorian Date */ in rtc_get()
129 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_wday, in rtc_get()
130 tm->tm_hour, tm->tm_min, tm->tm_sec); in rtc_get()
/rk3399_rockchip-uboot/post/drivers/
H A Drtc.c60 static void rtc_post_restore (struct rtc_time *tm, unsigned int sec) in rtc_post_restore() argument
62 time_t t = rtc_mktime(tm) + sec; in rtc_post_restore()
119 struct rtc_time tm; in rtc_post_test() local
121 tm.tm_year = ynl; in rtc_post_test()
122 tm.tm_mon = i + 1; in rtc_post_test()
123 tm.tm_mday = daysnl[i]; in rtc_post_test()
124 tm.tm_hour = 23; in rtc_post_test()
125 tm.tm_min = 59; in rtc_post_test()
126 tm.tm_sec = 59; in rtc_post_test()
127 t = rtc_mktime(&tm); in rtc_post_test()
[all …]
/rk3399_rockchip-uboot/cmd/
H A Ddate.c35 struct rtc_time tm; in do_date() local
73 rcode = dm_rtc_get(dev, &tm); in do_date()
75 rcode = rtc_get(&tm); in do_date()
79 if (mk_date(argv[1], &tm) != 0) { in do_date()
85 rcode = dm_rtc_set(dev, &tm); in do_date()
87 rcode = rtc_set(&tm); in do_date()
100 rcode = dm_rtc_get(dev, &tm); in do_date()
102 rcode = rtc_get(&tm); in do_date()
110 tm.tm_year, tm.tm_mon, tm.tm_mday, in do_date()
111 (tm.tm_wday<0 || tm.tm_wday>6) ? in do_date()
[all …]
/rk3399_rockchip-uboot/net/
H A Dsntp.c56 struct rtc_time tm; in sntp_handler() local
72 rtc_to_tm(ntohl(seconds) - 2208988800UL + net_ntp_time_offset, &tm); in sntp_handler()
82 dm_rtc_set(dev, &tm); in sntp_handler()
84 rtc_set(&tm); in sntp_handler()
88 tm.tm_year, tm.tm_mon, tm.tm_mday, in sntp_handler()
89 tm.tm_hour, tm.tm_min, tm.tm_sec); in sntp_handler()
/rk3399_rockchip-uboot/drivers/ddr/marvell/a38x/
H A Dddr3_hws_hw_training.c26 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_if_ecc_enabled() local
28 if (DDR3_IS_ECC_PUP4_MODE(tm->bus_act_mask) || in ddr3_if_ecc_enabled()
29 DDR3_IS_ECC_PUP3_MODE(tm->bus_act_mask)) in ddr3_if_ecc_enabled()
37 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_pre_algo_config() local
40 if (DDR3_IS_ECC_PUP3_MODE(tm->bus_act_mask)) { in ddr3_pre_algo_config()
48 if ((DDR3_IS_ECC_PUP4_MODE(tm->bus_act_mask)) || in ddr3_pre_algo_config()
49 (DDR3_IS_ECC_PUP3_MODE(tm->bus_act_mask))) { in ddr3_pre_algo_config()
69 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_post_algo_config() local
79 if ((DDR3_IS_ECC_PUP4_MODE(tm->bus_act_mask)) || in ddr3_post_algo_config()
80 (DDR3_IS_ECC_PUP3_MODE(tm->bus_act_mask))) { in ddr3_post_algo_config()
H A Dddr3_training_leveling.c45 struct hws_topology_map *tm = ddr3_get_topology_map(); in hws_ddr3_tip_max_cs_get() local
49 VALIDATE_ACTIVE(tm-> in hws_ddr3_tip_max_cs_get()
75 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_dynamic_read_leveling() local
98 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_dynamic_read_leveling()
135 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_dynamic_read_leveling()
158 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_dynamic_read_leveling()
217 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_dynamic_read_leveling()
219 tm->interface_params[if_id].speed_bin_index; in ddr3_tip_dynamic_read_leveling()
294 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_dynamic_read_leveling()
325 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_dynamic_read_leveling()
[all …]
H A Dddr3_training_pbs.c58 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_pbs() local
62 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
87 tm->if_act_mask, init_val, iterations, in ddr3_tip_pbs()
91 for (pup = 0; pup < tm->num_of_bus_per_interface; pup++) { in ddr3_tip_pbs()
92 VALIDATE_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
94 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
104 for (pup = 0; pup < tm->num_of_bus_per_interface; pup++) { in ddr3_tip_pbs()
105 VALIDATE_ACTIVE(tm->bus_act_mask, pup); in ddr3_tip_pbs()
115 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_pbs()
180 for (pup = 0; pup < tm->num_of_bus_per_interface; pup++) { in ddr3_tip_pbs()
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H A Dddr3_debug.c102 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_reg_dump() local
108 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_reg_dump()
122 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_reg_dump()
124 bus_id < tm->num_of_bus_per_interface; in ddr3_tip_reg_dump()
126 VALIDATE_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_reg_dump()
135 bus_id < tm->num_of_bus_per_interface; in ddr3_tip_reg_dump()
137 VALIDATE_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_reg_dump()
283 struct hws_topology_map *tm = ddr3_get_topology_map(); in print_device_info() local
289 print_topology(tm); in print_device_info()
328 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_print_log() local
[all …]
H A Dddr3_training.c211 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_configure_cs() local
214 data = (tm->interface_params[if_id].bus_width == in ddr3_tip_configure_cs()
220 mem_index = tm->interface_params[if_id].memory_size; in ddr3_tip_configure_cs()
270 struct hws_topology_map *tm = ddr3_get_topology_map(); in calc_cs_num() local
273 VALIDATE_ACTIVE(tm->bus_act_mask, bus_cnt); in calc_cs_num()
275 cs_bitmask = tm->interface_params[if_id]. in calc_cs_num()
317 struct hws_topology_map *tm = ddr3_get_topology_map(); in hws_ddr3_tip_init_controller() local
330 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in hws_ddr3_tip_init_controller()
337 VALIDATE_ACTIVE(tm->bus_act_mask, bus_index); in hws_ddr3_tip_init_controller()
339 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()
[all …]
H A Dddr3_training_centralization.c69 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_centralization() local
85 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_centralization()
108 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_centralization()
110 bus_id < tm->num_of_bus_per_interface; bus_id++) { in ddr3_tip_centralization()
111 VALIDATE_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_centralization()
129 tm-> in ddr3_tip_centralization()
137 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_centralization()
139 bus_id <= tm->num_of_bus_per_interface - 1; in ddr3_tip_centralization()
141 VALIDATE_ACTIVE(tm->bus_act_mask, bus_id); in ddr3_tip_centralization()
349 if (IS_ACTIVE(tm->if_act_mask, if_id) == 0) in ddr3_tip_centralization()
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H A Dddr3_training_hw_algo.c59 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_write_additional_odt_setting() local
80 pup_index < tm->num_of_bus_per_interface; in ddr3_tip_write_additional_odt_setting()
174 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_vref() local
188 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_vref()
190 pup < tm->num_of_bus_per_interface; pup++) { in ddr3_tip_vref()
226 num_pup = tm->num_of_bus_per_interface * MAX_INTERFACE_NUM; in ddr3_tip_vref()
237 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_vref()
241 pup < tm->num_of_bus_per_interface; in ddr3_tip_vref()
244 (tm->bus_act_mask, pup); in ddr3_tip_vref()
261 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_vref()
[all …]
H A Dddr3_training_ip_engine.c195 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_ip_training() local
197 if (pup_num >= tm->num_of_bus_per_interface) { in ddr3_tip_ip_training()
333 mask_dq_num_of_regs = tm->num_of_bus_per_interface * BUS_WIDTH_IN_BITS; in ddr3_tip_ip_training()
334 mask_pup_num_of_regs = tm->num_of_bus_per_interface; in ddr3_tip_ip_training()
346 for (pup_id = 0; pup_id < tm->num_of_bus_per_interface; in ddr3_tip_ip_training()
348 if (IS_ACTIVE(tm->bus_act_mask, pup_id) == 1) in ddr3_tip_ip_training()
397 if (IS_ACTIVE(tm->if_act_mask, index_cnt) == 0) in ddr3_tip_ip_training()
435 if (IS_ACTIVE(tm->if_act_mask, index_cnt) == 0) in ddr3_tip_ip_training()
601 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_read_training_result() local
625 if (pup_num >= tm->num_of_bus_per_interface) { in ddr3_tip_read_training_result()
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H A Dddr3_training_static.c103 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_static_round_trip_arr_build() local
114 VALIDATE_ACTIVE(tm->if_act_mask, if_id); in ddr3_tip_static_round_trip_arr_build()
117 VALIDATE_ACTIVE(tm->bus_act_mask, bus_index); in ddr3_tip_static_round_trip_arr_build()
171 VALIDATE_ACTIVE(tm->bus_act_mask, bus_index); in ddr3_tip_write_leveling_static_config()
225 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_read_leveling_static_config() local
237 if (tm->interface_params[first_active_if].memory_freq == in ddr3_tip_read_leveling_static_config()
239 cl_value = tm->interface_params[first_active_if].cas_l; in ddr3_tip_read_leveling_static_config()
243 speed_bin_index = tm->interface_params[if_id].speed_bin_index; in ddr3_tip_read_leveling_static_config()
255 VALIDATE_ACTIVE(tm->bus_act_mask, bus_index); in ddr3_tip_read_leveling_static_config()
257 tm->interface_params[if_id].as_bus_params[ in ddr3_tip_read_leveling_static_config()
[all …]
H A Dddr3_training_bist.c40 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_bist_activate() local
89 VALIDATE_ACTIVE(tm-> in ddr3_tip_bist_activate()
145 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_bist_read_result() local
147 if (IS_ACTIVE(tm->if_act_mask, if_id) == 0) in ddr3_tip_bist_read_result()
191 struct hws_topology_map *tm = ddr3_get_topology_map(); in hws_ddr3_run_bist() local
194 VALIDATE_ACTIVE(tm->if_act_mask, i); in hws_ddr3_run_bist()
257 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_print_bist_res() local
260 if (IS_ACTIVE(tm->if_act_mask, i) == 0) in ddr3_tip_print_bist_res()
277 if (IS_ACTIVE(tm->if_act_mask, i) == in ddr3_tip_print_bist_res()
H A Dddr3_a38x.c354 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_init_a38x_silicon() local
376 tm->num_of_bus_per_interface; in ddr3_tip_init_a38x_silicon()
441 init_freq = tm->interface_params[first_active_if].memory_freq; in ddr3_tip_init_a38x_silicon()
448 int ddr3_a38x_update_topology_map(u32 dev_num, struct hws_topology_map *tm) in ddr3_a38x_update_topology_map() argument
454 tm->interface_params[if_id].memory_freq = freq; in ddr3_a38x_update_topology_map()
460 CHECK_STATUS(hws_ddr3_tip_load_topology_map(dev_num, tm)); in ddr3_a38x_update_topology_map()
467 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_tip_init_a38x() local
469 if (NULL == tm) in ddr3_tip_init_a38x()
472 ddr3_a38x_update_topology_map(dev_num, tm); in ddr3_tip_init_a38x()
719 struct hws_topology_map *tm = ddr3_get_topology_map(); in ddr3_silicon_post_init() local
[all …]
/rk3399_rockchip-uboot/include/linux/
H A Dtime.h28 struct tm { struct
50 _CONST struct tm *tim_p _AND
69 static inline struct tm *
72 struct tm *res)
149 struct tm tm; variable
150 return asctime_r (localtime_r (tim_p, &tm), result);
/rk3399_rockchip-uboot/drivers/spi/
H A Dmpc8xxx_spi.c81 int tm, isRead = 0; in spi_xfer() local
134 for (tm = 0, isRead = 0; tm < SPI_TIMEOUT; ++tm) { in spi_xfer()
156 if (tm >= SPI_TIMEOUT) in spi_xfer()
H A Dtegra210_qspi.c213 int num_bytes, tm, ret; in tegra210_qspi_xfer() local
232 tm = QSPI_TIMEOUT; in tegra210_qspi_xfer()
233 while ((tm && readl(&regs->fifo_status) & in tegra210_qspi_xfer()
236 tm--; in tegra210_qspi_xfer()
240 if (!tm) { in tegra210_qspi_xfer()
308 for (tm = 0; tm < QSPI_TIMEOUT; ++tm) { in tegra210_qspi_xfer()
349 if (tm >= QSPI_TIMEOUT) in tegra210_qspi_xfer()
350 ret = tm; in tegra210_qspi_xfer()
/rk3399_rockchip-uboot/lib/efi_loader/
H A Defi_runtime.c98 struct rtc_time tm; in efi_get_time_boottime() local
108 r = dm_rtc_get(dev, &tm); in efi_get_time_boottime()
113 time->year = tm.tm_year; in efi_get_time_boottime()
114 time->month = tm.tm_mon; in efi_get_time_boottime()
115 time->day = tm.tm_mday; in efi_get_time_boottime()
116 time->hour = tm.tm_hour; in efi_get_time_boottime()
117 time->minute = tm.tm_min; in efi_get_time_boottime()
118 time->daylight = tm.tm_isdst; in efi_get_time_boottime()

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