195 	struct hws_topology_map *tm = ddr3_get_topology_map();  in ddr3_tip_ip_training()  local
197 	if (pup_num >= tm->num_of_bus_per_interface) {  in ddr3_tip_ip_training()
333 	mask_dq_num_of_regs = tm->num_of_bus_per_interface * BUS_WIDTH_IN_BITS;  in ddr3_tip_ip_training()
334 	mask_pup_num_of_regs = tm->num_of_bus_per_interface;  in ddr3_tip_ip_training()
346 		for (pup_id = 0; pup_id < tm->num_of_bus_per_interface;  in ddr3_tip_ip_training()
348 			if (IS_ACTIVE(tm->bus_act_mask, pup_id) == 1)  in ddr3_tip_ip_training()
397 		if (IS_ACTIVE(tm->if_act_mask, index_cnt) == 0)  in ddr3_tip_ip_training()
435 		if (IS_ACTIVE(tm->if_act_mask, index_cnt) == 0)  in ddr3_tip_ip_training()
601 	struct hws_topology_map *tm = ddr3_get_topology_map();  in ddr3_tip_read_training_result()  local
625 	if (pup_num >= tm->num_of_bus_per_interface) {  in ddr3_tip_read_training_result()
643 		end_pup = tm->num_of_bus_per_interface - 1;  in ddr3_tip_read_training_result()
647 		VALIDATE_ACTIVE(tm->bus_act_mask, pup_cnt);  in ddr3_tip_read_training_result()
741 	struct hws_topology_map *tm = ddr3_get_topology_map();  in ddr3_tip_load_all_pattern_to_mem()  local
744 		VALIDATE_ACTIVE(tm->if_act_mask, if_id);  in ddr3_tip_load_all_pattern_to_mem()
749 		VALIDATE_ACTIVE(tm->if_act_mask, if_id);  in ddr3_tip_load_all_pattern_to_mem()
802 	struct hws_topology_map *tm = ddr3_get_topology_map();  in ddr3_tip_load_pattern_to_mem()  local
833 		if (IS_ACTIVE(tm->if_act_mask, if_id) == 0)  in ddr3_tip_load_pattern_to_mem()
849 		VALIDATE_ACTIVE(tm->if_act_mask, if_id);  in ddr3_tip_load_pattern_to_mem()
907 	struct hws_topology_map *tm = ddr3_get_topology_map();  in ddr3_tip_ip_training_wrapper_int()  local
922 	    (pup_num >= tm->num_of_bus_per_interface) ||  in ddr3_tip_ip_training_wrapper_int()
972 			VALIDATE_ACTIVE(tm->if_act_mask, interface_num);  in ddr3_tip_ip_training_wrapper_int()
1010 	struct hws_topology_map *tm = ddr3_get_topology_map();  in ddr3_tip_ip_training_wrapper()  local
1012 	if (pup_num >= tm->num_of_bus_per_interface) {  in ddr3_tip_ip_training_wrapper()
1039 		VALIDATE_ACTIVE(tm->if_act_mask, interface_cnt);  in ddr3_tip_ip_training_wrapper()
1041 		     pup_id <= (tm->num_of_bus_per_interface - 1); pup_id++) {  in ddr3_tip_ip_training_wrapper()
1042 			VALIDATE_ACTIVE(tm->bus_act_mask, pup_id);  in ddr3_tip_ip_training_wrapper()
1110 			     pup_id <= (tm->num_of_bus_per_interface - 1);  in ddr3_tip_ip_training_wrapper()
1112 				VALIDATE_ACTIVE(tm->bus_act_mask, pup_id);  in ddr3_tip_ip_training_wrapper()
1145 			     pup_id <= (tm->num_of_bus_per_interface - 1);  in ddr3_tip_ip_training_wrapper()
1147 				VALIDATE_ACTIVE(tm->bus_act_mask, pup_id);  in ddr3_tip_ip_training_wrapper()
1179 	struct hws_topology_map *tm = ddr3_get_topology_map();  in ddr3_tip_load_phy_values()  local
1182 		VALIDATE_ACTIVE(tm->if_act_mask, if_id);  in ddr3_tip_load_phy_values()
1185 			VALIDATE_ACTIVE(tm->bus_act_mask, bus_cnt);  in ddr3_tip_load_phy_values()
1261 	struct hws_topology_map *tm = ddr3_get_topology_map();  in ddr3_tip_training_ip_test()  local
1283 				VALIDATE_ACTIVE(tm->if_act_mask, if_id);  in ddr3_tip_training_ip_test()
1285 					     tm->num_of_bus_per_interface;  in ddr3_tip_training_ip_test()
1287 					VALIDATE_ACTIVE(tm->bus_act_mask,  in ddr3_tip_training_ip_test()
1328 	struct hws_topology_map *tm = ddr3_get_topology_map();  in ddr3_tip_get_pattern_table()  local
1330 	if (DDR3_IS_16BIT_DRAM_MODE(tm->bus_act_mask) == 0)  in ddr3_tip_get_pattern_table()
1338 	struct hws_topology_map *tm = ddr3_get_topology_map();  in ddr3_tip_get_mask_results_dq_reg()  local
1340 	if (DDR3_IS_ECC_PUP3_MODE(tm->bus_act_mask))  in ddr3_tip_get_mask_results_dq_reg()
1348 	struct hws_topology_map *tm = ddr3_get_topology_map();  in ddr3_tip_get_mask_results_pup_reg_map()  local
1350 	if (DDR3_IS_ECC_PUP3_MODE(tm->bus_act_mask))  in ddr3_tip_get_mask_results_pup_reg_map()