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Searched refs:temp (Results 1 – 25 of 178) sorted by relevance

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/rk3399_rockchip-uboot/board/freescale/common/
H A Ddcu_sii9022a.c64 u8 temp; in dcu_set_dvi_encoder() local
71 temp = TPI_TRANS_MODE_ENABLE; in dcu_set_dvi_encoder()
72 i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_TRANS_MODE_REG, 1, &temp, 1); in dcu_set_dvi_encoder()
75 i2c_read(CONFIG_SYS_I2C_DVI_ADDR, TPI_PWR_STAT_REG, 1, &temp, 1); in dcu_set_dvi_encoder()
76 temp &= ~TPI_PWR_STAT_MASK; in dcu_set_dvi_encoder()
77 temp |= TPI_PWR_STAT_D0; in dcu_set_dvi_encoder()
78 i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_PWR_STAT_REG, 1, &temp, 1); in dcu_set_dvi_encoder()
81 temp = TPI_SET_PAGE_SII9022A; in dcu_set_dvi_encoder()
82 i2c_write(CONFIG_SYS_I2C_DVI_ADDR, TPI_SET_PAGE_REG, 1, &temp, 1); in dcu_set_dvi_encoder()
83 temp = TPI_SET_OFFSET_SII9022A; in dcu_set_dvi_encoder()
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H A Ddiu_ch7301.c52 u8 temp; in diu_set_dvi_encoder() local
54 temp = I2C_DVI_TEST_PATTERN_VAL; in diu_set_dvi_encoder()
56 &temp, 1); in diu_set_dvi_encoder()
61 temp = I2C_DVI_INPUT_DATA_FORMAT_VAL; in diu_set_dvi_encoder()
63 1, &temp, 1); in diu_set_dvi_encoder()
70 temp = I2C_DVI_SYNC_POLARITY_VAL; in diu_set_dvi_encoder()
72 &temp, 1); in diu_set_dvi_encoder()
80 temp = I2C_DVI_PLL_CHARGE_CNTL_HIGH_SPEED_VAL; in diu_set_dvi_encoder()
82 I2C_DVI_PLL_CHARGE_CNTL_REG, 1, &temp, 1); in diu_set_dvi_encoder()
87 temp = I2C_DVI_PLL_DIVIDER_HIGH_SPEED_VAL; in diu_set_dvi_encoder()
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/rk3399_rockchip-uboot/arch/m68k/lib/
H A Dcache.c53 u32 temp = 0; in icache_disable() local
59 __asm__ __volatile__("movec %0, %%acr2"::"r"(temp)); in icache_disable()
60 __asm__ __volatile__("movec %0, %%acr3"::"r"(temp)); in icache_disable()
62 __asm__ __volatile__("movec %0, %%acr6"::"r"(temp)); in icache_disable()
63 __asm__ __volatile__("movec %0, %%acr7"::"r"(temp)); in icache_disable()
66 __asm__ __volatile__("movec %0, %%acr0"::"r"(temp)); in icache_disable()
67 __asm__ __volatile__("movec %0, %%acr1"::"r"(temp)); in icache_disable()
73 u32 temp; in icache_invalid() local
75 temp = CONFIG_SYS_ICACHE_INV; in icache_invalid()
77 temp |= CONFIG_SYS_CACHE_ICACR; in icache_invalid()
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/rk3399_rockchip-uboot/arch/x86/cpu/quark/
H A Dmrc_util.c143 uint32_t temp; in set_rcvn() local
158 temp = (byte_lane & 1) ? (pi_count / HALF_CLK) << 20 : in set_rcvn()
160 mrc_alt_write_mask(DDRPHY, reg, temp, msk); in set_rcvn()
174 temp = pi_count << 24; in set_rcvn()
175 mrc_alt_write_mask(DDRPHY, reg, temp, msk); in set_rcvn()
185 temp = 0x00; in set_rcvn()
190 temp |= msk; in set_rcvn()
195 temp |= msk; in set_rcvn()
197 mrc_alt_write_mask(DDRPHY, reg, temp, msk); in set_rcvn()
217 uint32_t temp; in get_rcvn() local
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/rk3399_rockchip-uboot/board/freescale/mpc8610hpcd/
H A Dmpc8610hpcd_diu.c25 unsigned long speed_ccb, temp, pixval; in diu_set_pixel_clock() local
28 temp = 1000000000/pixclock; in diu_set_pixel_clock()
29 temp *= 1000; in diu_set_pixel_clock()
30 pixval = speed_ccb / temp; in diu_set_pixel_clock()
35 temp = *guts_clkdvdr & 0x2000FFFF; in diu_set_pixel_clock()
36 *guts_clkdvdr = temp; /* turn off clock */ in diu_set_pixel_clock()
37 *guts_clkdvdr = temp | 0x80000000 | ((pixval & 0x1F) << 16); in diu_set_pixel_clock()
46 u8 temp; in platform_diu_init() local
48 temp = in_8(&pixis->brdcfg0); in platform_diu_init()
53 temp &= ~(PX_BRDCFG0_DLINK | PX_BRDCFG0_DVISEL); in platform_diu_init()
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/rk3399_rockchip-uboot/drivers/i2c/
H A Dtsi108_i2c.c46 u32 temp; in i2c_read_byte() local
58 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); in i2c_read_byte()
60 if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_WR_STATUS | in i2c_read_byte()
63 temp = (byte_addr << 16) | ((chip_addr & 0x07) << 8) | in i2c_read_byte()
66 temp; in i2c_read_byte()
79 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + chan_offset + I2C_CNTRL2); in i2c_read_byte()
81 if (0 == (temp & (I2C_CNTRL2_RD_STATUS | I2C_CNTRL2_START))) { in i2c_read_byte()
82 if (0 == (temp & in i2c_read_byte()
88 temp = *(u32 *) (CONFIG_SYS_TSI108_CSR_BASE + in i2c_read_byte()
92 *buffer = (u8) (temp & 0xFF); in i2c_read_byte()
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/rk3399_rockchip-uboot/arch/m68k/cpu/mcf5445x/
H A Dspeed.c75 int temp, vco = 0, bootmod_ccr, pdr; in setup_5441x_clocks() local
93 temp = in_be32(&pll->pcr); in setup_5441x_clocks()
94 temp &= ~0x3f; in setup_5441x_clocks()
95 temp |= 5; in setup_5441x_clocks()
96 out_be32(&pll->pcr, temp); in setup_5441x_clocks()
98 temp = in_be32(&pll->pdr); in setup_5441x_clocks()
99 temp &= ~0x001f0000; in setup_5441x_clocks()
100 temp |= 0x00040000; in setup_5441x_clocks()
101 out_be32(&pll->pdr, temp); in setup_5441x_clocks()
114 temp = (pdr & PLL_DR_OUTDIV1_BITS) + 1; in setup_5441x_clocks()
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/rk3399_rockchip-uboot/arch/arm/include/asm/proc-armv/
H A Dsystem.h72 unsigned long temp; \
77 : "=r" (x), "=r" (temp) \
87 unsigned long temp; \
92 : "=r" (temp) \
102 unsigned long temp; \
107 : "=r" (temp) \
117 unsigned long temp; \
122 : "=r" (temp) \
132 unsigned long temp; \
137 : "=r" (temp) \
/rk3399_rockchip-uboot/board/freescale/p1022ds/
H A Dp1022ds.c106 u8 temp; in misc_init_r() local
113 temp = 0xBF; in misc_init_r()
114 if (i2c_write(CONFIG_TFP410_I2C_ADDR, 0x08, 1, &temp, sizeof(temp)) < 0) in misc_init_r()
116 if (i2c_read(CONFIG_TFP410_I2C_ADDR, 0x08, 1, &temp, sizeof(temp)) < 0) in misc_init_r()
118 debug("DVI Encoder Read: 0x%02x\n", temp); in misc_init_r()
120 temp = 0x10; in misc_init_r()
121 if (i2c_write(CONFIG_TFP410_I2C_ADDR, 0x0A, 1, &temp, sizeof(temp)) < 0) in misc_init_r()
123 if (i2c_read(CONFIG_TFP410_I2C_ADDR, 0x0A, 1, &temp, sizeof(temp)) < 0) in misc_init_r()
125 debug("DVI Encoder Read: 0x%02x\n",temp); in misc_init_r()
157 temp = in_8(&pixis->brdcfg1) & ~(CONFIG_PIXIS_BRDCFG1_SSI_TDM_MASK | in misc_init_r()
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H A Ddiu.c69 unsigned long speed_ccb, temp; in diu_set_pixel_clock() local
73 temp = 1000000000 / pixclock; in diu_set_pixel_clock()
74 temp *= 1000; in diu_set_pixel_clock()
75 pixval = speed_ccb / temp; in diu_set_pixel_clock()
79 temp = in_be32(&gur->clkdvdr) & 0x2000FFFF; in diu_set_pixel_clock()
80 out_be32(&gur->clkdvdr, temp); /* turn off clock */ in diu_set_pixel_clock()
81 out_be32(&gur->clkdvdr, temp | 0x80000000 | ((pixval & 0x1F) << 16)); in diu_set_pixel_clock()
89 u8 temp; in platform_diu_init() local
154 temp = in_8(&pixis->brdcfg1); in platform_diu_init()
158 temp &= ~PX_BRDCFG1_DVIEN; in platform_diu_init()
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/rk3399_rockchip-uboot/arch/arm/include/asm/
H A Dutils.h14 u32 temp = n; in log_2_n_round_up() local
16 while (temp) { in log_2_n_round_up()
18 temp >>= 1; in log_2_n_round_up()
30 u32 temp = n; in log_2_n_round_down() local
32 while (temp) { in log_2_n_round_down()
34 temp >>= 1; in log_2_n_round_down()
/rk3399_rockchip-uboot/common/
H A Diomux.c29 char *console_args, *temp, **start; in iomux_doenv() local
47 temp = console_args; in iomux_doenv()
49 temp = strchr(temp, ','); in iomux_doenv()
50 if (temp != NULL) { in iomux_doenv()
52 temp++; in iomux_doenv()
67 temp = strchr(start[i++], ','); in iomux_doenv()
68 if (temp == NULL) in iomux_doenv()
70 *temp = '\0'; in iomux_doenv()
71 start[i] = temp + 1; in iomux_doenv()
/rk3399_rockchip-uboot/board/gdsys/p1022/
H A Ddiu.c51 unsigned long speed_ccb, temp; in diu_set_pixel_clock() local
55 temp = 1000000000 / pixclock; in diu_set_pixel_clock()
56 temp *= 1000; in diu_set_pixel_clock()
57 pixval = speed_ccb / temp; in diu_set_pixel_clock()
61 temp = in_be32(&gur->clkdvdr) & 0x2000FFFF; in diu_set_pixel_clock()
62 out_be32(&gur->clkdvdr, temp); /* turn off clock */ in diu_set_pixel_clock()
63 out_be32(&gur->clkdvdr, temp | 0x80000000 | ((pixval & 0x1F) << 16)); in diu_set_pixel_clock()
/rk3399_rockchip-uboot/drivers/mtd/
H A Dmw_eeprom.c157 u16 temp = mw_eeprom_read_word(dev, addr >> 1); in mw_eeprom_write() local
158 temp &= 0xff00; in mw_eeprom_write()
159 temp |= buffer[0]; in mw_eeprom_write()
161 mw_eeprom_write_word(dev, addr >> 1, temp); in mw_eeprom_write()
177 u16 temp = mw_eeprom_read_word(dev, addr >> 1); in mw_eeprom_write() local
178 temp &= 0x00ff; in mw_eeprom_write()
179 temp |= buffer[0] << 8; in mw_eeprom_write()
181 mw_eeprom_write_word(dev, addr >> 1, temp); in mw_eeprom_write()
198 u16 temp = mw_eeprom_read_word(dev, addr >> 1); in mw_eeprom_read() local
199 buffer[0]= temp & 0xff; in mw_eeprom_read()
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/rk3399_rockchip-uboot/arch/arm/mach-kirkwood/
H A Dcpu.c276 volatile u32 temp; in arch_misc_init() local
279 temp = readfr_extra_feature_reg(); in arch_misc_init()
280 temp &= ~(1 << 28); /* disable wr alloc */ in arch_misc_init()
281 writefr_extra_feature_reg(temp); in arch_misc_init()
283 temp = readfr_extra_feature_reg(); in arch_misc_init()
284 temp &= ~(1 << 29); /* streaming disabled */ in arch_misc_init()
285 writefr_extra_feature_reg(temp); in arch_misc_init()
288 temp = readfr_extra_feature_reg(); in arch_misc_init()
290 temp |= (1 << 24); in arch_misc_init()
292 temp |= (1 << 22); in arch_misc_init()
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/rk3399_rockchip-uboot/arch/mips/mach-au1x00/
H A Dau1x00_usb_ohci.c97 u32 temp = readl (&hc->regs->roothub.register); \
99 while (temp & mask) \
100 temp = readl (&hc->regs->roothub.register); \
101 temp; })
254 __u32 temp; in ohci_dump_status() local
256 temp = readl (&regs->revision) & 0xff; in ohci_dump_status()
257 if (temp != 0x10) in ohci_dump_status()
258 dbg ("spec %d.%d", (temp >> 4), (temp & 0x0f)); in ohci_dump_status()
260 temp = readl (&regs->control); in ohci_dump_status()
261 dbg ("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp, in ohci_dump_status()
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/rk3399_rockchip-uboot/arch/arm/mach-orion5x/
H A Dcpu.c251 u32 temp; in arch_misc_init() local
254 temp = readfr_extra_feature_reg(); in arch_misc_init()
255 temp &= ~(1 << 28); /* disable wr alloc */ in arch_misc_init()
256 writefr_extra_feature_reg(temp); in arch_misc_init()
258 temp = readfr_extra_feature_reg(); in arch_misc_init()
259 temp &= ~(1 << 29); /* streaming disabled */ in arch_misc_init()
260 writefr_extra_feature_reg(temp); in arch_misc_init()
263 temp = readfr_extra_feature_reg(); in arch_misc_init()
265 temp |= (1 << 24); in arch_misc_init()
267 temp |= (1 << 22); in arch_misc_init()
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/rk3399_rockchip-uboot/board/freescale/t104xrdb/
H A Ddiu.c41 unsigned long speed_ccb, temp; in diu_set_pixel_clock() local
46 temp = 1000000000 / pixclock; in diu_set_pixel_clock()
47 temp *= 1000; in diu_set_pixel_clock()
48 pixval = speed_ccb / temp; in diu_set_pixel_clock()
51 ret = diu_set_dvi_encoder(temp); in diu_set_pixel_clock()
/rk3399_rockchip-uboot/lib/
H A Drc4.c18 unsigned char s[256], k[256], temp; in rc4_encode() local
33 temp = s[i]; in rc4_encode()
35 s[j] = temp; in rc4_encode()
43 temp = s[i]; in rc4_encode()
45 s[j] = temp; in rc4_encode()
/rk3399_rockchip-uboot/drivers/net/
H A Dxilinx_axi_emac.c267 u16 temp; in setup_phy() local
279 ret = phyread(priv, priv->phyaddr, MII_BMCR, &temp); in setup_phy()
282 if (temp & BMCR_ISOLATE) { in setup_phy()
283 temp &= ~BMCR_ISOLATE; in setup_phy()
284 ret = phywrite(priv, priv->phyaddr, MII_BMCR, temp); in setup_phy()
336 u32 temp; in axiemac_stop() local
339 temp = in_be32(&priv->dmatx->control); in axiemac_stop()
340 temp &= ~XAXIDMA_CR_RUNSTOP_MASK; in axiemac_stop()
341 out_be32(&priv->dmatx->control, temp); in axiemac_stop()
343 temp = in_be32(&priv->dmarx->control); in axiemac_stop()
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/rk3399_rockchip-uboot/drivers/thermal/
H A Drockchip_thermal.c174 int temp; member
207 int *temp);
210 int chn, int temp);
212 int chn, int temp);
617 int *temp) in tsadc_code_to_temp() argument
626 *temp = (((int)code - table->bnum) * 10000 / table->knum) * 100; in tsadc_code_to_temp()
627 if (*temp < MIN_TEMP || *temp > MAX_TEMP) in tsadc_code_to_temp()
679 num = table->id[mid].temp - table->id[mid - 1].temp; in tsadc_code_to_temp()
682 *temp = table->id[mid - 1].temp + (num / denom); in tsadc_code_to_temp()
688 int temp) in tsadc_temp_to_code_v2() argument
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/rk3399_rockchip-uboot/drivers/crypto/rockchip/
H A Dcrypto_v2_util.c26 u32 temp; in util_reverse_words_buff() local
35 temp = *high_swap_ptr; in util_reverse_words_buff()
37 *(low_swap_ptr++) = temp; in util_reverse_words_buff()
58 u32 temp; in util_reverse_buff() local
67 temp = *high_swap_ptr; in util_reverse_buff()
69 *(low_swap_ptr++) = temp; in util_reverse_buff()
/rk3399_rockchip-uboot/arch/arm/cpu/armv8/
H A Dgeneric_timer.c32 unsigned long temp; in timer_read_counter() local
37 asm volatile("mrs %0, cntpct_el0" : "=r" (temp)); in timer_read_counter()
38 while (temp != cntpct) { in timer_read_counter()
40 asm volatile("mrs %0, cntpct_el0" : "=r" (temp)); in timer_read_counter()
/rk3399_rockchip-uboot/board/freescale/t1040qds/
H A Ddiu.c41 unsigned long speed_ccb, temp; in diu_set_pixel_clock() local
45 temp = 1000000000 / pixclock; in diu_set_pixel_clock()
46 temp *= 1000; in diu_set_pixel_clock()
47 pixval = speed_ccb / temp; in diu_set_pixel_clock()
54 ret = diu_set_dvi_encoder(temp); in diu_set_pixel_clock()
/rk3399_rockchip-uboot/drivers/usb/host/
H A Dohci-hcd.c388 __u32 temp; in ohci_dump_status() local
390 temp = ohci_readl(&regs->revision) & 0xff; in ohci_dump_status()
391 if (temp != 0x10) in ohci_dump_status()
392 dbg("spec %d.%d", (temp >> 4), (temp & 0x0f)); in ohci_dump_status()
394 temp = ohci_readl(&regs->control); in ohci_dump_status()
395 dbg("control: 0x%08x%s%s%s HCFS=%s%s%s%s%s CBSR=%d", temp, in ohci_dump_status()
396 (temp & OHCI_CTRL_RWE) ? " RWE" : "", in ohci_dump_status()
397 (temp & OHCI_CTRL_RWC) ? " RWC" : "", in ohci_dump_status()
398 (temp & OHCI_CTRL_IR) ? " IR" : "", in ohci_dump_status()
399 hcfs2string(temp & OHCI_CTRL_HCFS), in ohci_dump_status()
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