Searched refs:tWR (Results 1 – 10 of 10) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/mach-omap2/omap4/ |
| H A D | emif.c | 29 .tWR = 15,
53 .tWR = 15,
82 .tWR = 3,
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| H A D | sdram_elpida.c | 196 .tWR = 15,
219 .tWR = 15,
242 .tWR = 15,
264 .tWR = 3,
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| /rk3399_rockchip-uboot/arch/arm/mach-omap2/omap5/ |
| H A D | emif.c | 30 .tWR = 15,
59 .tWR = 3,
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| H A D | sdram.c | 614 .tWR = 15,
636 .tWR = 3,
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| /rk3399_rockchip-uboot/arch/arm/mach-sunxi/ |
| H A D | dram_sun9i.c | 126 u32 tWR; /* in nCK */ member
389 const u32 tWR = NS2CYCLES_FLOOR(para->tWR); in mctl_channel_init() local
463 mr[0] = DDR3_MR0_PPD_FAST_EXIT | DDR3_MR0_WR(tWR) | in mctl_channel_init()
899 .tWR = 15, in sunxi_dram_init()
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| /rk3399_rockchip-uboot/arch/arm/include/asm/ |
| H A D | emif.h | 1099 u8 tWR; member
1128 u32 tWR; member
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| /rk3399_rockchip-uboot/board/buffalo/lsxl/ |
| H A D | kwbimage-lschl.cfg | 60 # bit15-12: 4, 5 cyle tWR
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| H A D | kwbimage-lsxhl.cfg | 60 # bit15-12: 5, 6 cyle tWR
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| /rk3399_rockchip-uboot/board/d-link/dns325/ |
| H A D | kwbimage.cfg | 57 # bit15-12: 5, 6 cyle tWR
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| /rk3399_rockchip-uboot/arch/arm/mach-omap2/ |
| H A D | emif-common.c | 618 val = max(min_tck->tWR, ns_2_cycles(timings->tWR)) - 1; in get_sdram_tim_1_reg()
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