Searched refs:ssr (Results 1 – 10 of 10) sorted by relevance
20 writel(0x000f0f0f, &h64mx->ssr[i]); in matrix_init()26 writel(0x00c0c0c0, &h32mx->ssr[H32MX_SLAVE_EBI]); in matrix_init()31 writel(0x00010101, &h32mx->ssr[H32MX_SLAVE_NFC_SRAM]); in matrix_init()
27 u32 ssr[16]; /* 0x200 ~ 0x23c: Security Slave Register */ member
35 u32 ssr; /* 0x0C SDRAMC Self Refresh Register */ member
141 if (IS_SD(mmc) && mmc->ssr.au) { in mmc_berase()142 blk_r = ((blkcnt - blk) > mmc->ssr.au) ? in mmc_berase()143 mmc->ssr.au : (blkcnt - blk); in mmc_berase()
1646 ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16);1664 data.dest = (char *)ssr;1678 ssr[i] = be32_to_cpu(ssr[i]);1680 au = (ssr[2] >> 12) & 0xF;1682 mmc->ssr.au = sd_au_size[au];1683 es = (ssr[3] >> 24) & 0xFF;1684 es |= (ssr[2] & 0xFF) << 8;1685 et = (ssr[3] >> 18) & 0x3F;1687 eo = (ssr[3] >> 16) & 0x3;1688 mmc->ssr.erase_timeout = (et * 1000) / es;[all …]
24 unsigned int ssr; /* 0x40 */ member
111 uint ssr; /* DMA source stride register */ member
91 UART_REG(ssr); /* 11*/
590 struct sd_ssr ssr; /* SD status register */ member
47 u32 ssr; member