| /rk3399_rockchip-uboot/board/freescale/m54418twr/ |
| H A D | m54418twr.c | 39 sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM); in dram_init() local
58 out_be32(&sdram->rcrcr, 0x40000000); in dram_init()
59 out_be32(&sdram->padcr, 0x01030203); in dram_init()
61 out_be32(&sdram->cr00, 0x01010101); in dram_init()
62 out_be32(&sdram->cr01, 0x00000101); in dram_init()
63 out_be32(&sdram->cr02, 0x01010100); in dram_init()
64 out_be32(&sdram->cr03, 0x01010000); in dram_init()
65 out_be32(&sdram->cr04, 0x00010101); in dram_init()
66 out_be32(&sdram->cr06, 0x00010100); in dram_init()
67 out_be32(&sdram->cr07, 0x00000001); in dram_init()
[all …]
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| /rk3399_rockchip-uboot/board/freescale/m5208evbe/ |
| H A D | m5208evbe.c | 27 sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); in dram_init() local
38 out_be32(&sdram->cs0, CONFIG_SYS_SDRAM_BASE | i); in dram_init()
40 out_be32(&sdram->cs1, CONFIG_SYS_SDRAM_BASE | i); in dram_init()
42 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
43 out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2); in dram_init()
48 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2); in dram_init()
52 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
53 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
57 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE); in dram_init()
59 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD); in dram_init()
[all …]
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| /rk3399_rockchip-uboot/board/freescale/m53017evb/ |
| H A D | m53017evb.c | 27 sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); in dram_init() local
38 out_be32(&sdram->cs0, CONFIG_SYS_SDRAM_BASE | i); in dram_init()
40 out_be32(&sdram->cs1, CONFIG_SYS_SDRAM_BASE | i); in dram_init()
42 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
43 out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2); in dram_init()
48 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2); in dram_init()
52 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
53 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
57 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE); in dram_init()
59 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD); in dram_init()
[all …]
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| /rk3399_rockchip-uboot/board/freescale/m5373evb/ |
| H A D | m5373evb.c | 27 sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); in dram_init() local
38 out_be32(&sdram->cs0, CONFIG_SYS_SDRAM_BASE | i); in dram_init()
39 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
40 out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2); in dram_init()
43 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2); in dram_init()
46 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD); in dram_init()
47 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000); in dram_init()
52 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2); in dram_init()
55 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
56 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
[all …]
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| /rk3399_rockchip-uboot/board/freescale/m5329evb/ |
| H A D | m5329evb.c | 27 sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); in dram_init() local
38 out_be32(&sdram->cs0, CONFIG_SYS_SDRAM_BASE | i); in dram_init()
39 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
40 out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2); in dram_init()
43 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2); in dram_init()
46 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD); in dram_init()
47 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000); in dram_init()
52 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2); in dram_init()
55 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
56 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
[all …]
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| /rk3399_rockchip-uboot/board/freescale/m54451evb/ |
| H A D | m54451evb.c | 39 sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM); in dram_init() local
45 if ((in_be32(&sdram->sdcfg1) == CONFIG_SYS_SDRAM_CFG1) && in dram_init()
46 (in_be32(&sdram->sdcfg2) == CONFIG_SYS_SDRAM_CFG2)) in dram_init()
57 out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i); in dram_init()
59 out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
60 out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2); in dram_init()
65 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2); in dram_init()
69 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
71 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
75 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE); in dram_init()
[all …]
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| /rk3399_rockchip-uboot/board/freescale/m52277evb/ |
| H A D | m52277evb.c | 35 sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM); in dram_init() local
49 out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i); in dram_init()
51 out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
52 out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2); in dram_init()
55 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2); in dram_init()
59 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE); in dram_init()
61 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_EMOD); in dram_init()
67 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2); in dram_init()
71 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
73 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
[all …]
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/ram/ |
| H A D | st,stm32-fmc.txt | 8 on-board sdram memory attributes:
9 - st,sdram-control : parameters for sdram configuration, in this order:
18 - st,sdram-timing: timings for sdram, in this order:
27 include/dt-bindings/memory/stm32-sdram.h to define sdram control and timing
43 /* sdram memory configuration from sdram datasheet */
45 st,sdram-control = /bits/ 8 <NO_COL_8 NO_ROW_12 MWIDTH_16 BANKS_2
47 st,sdram-timing = /bits/ 8 <TMRD_1 TXSR_60 TRAS_42 TRC_60 TRP_18
51 /* sdram memory configuration from sdram datasheet */
53 st,sdram-control = /bits/ 8 <NO_COL_8 NO_ROW_12 MWIDTH_16 BANKS_2
55 st,sdram-timing = /bits/ 8 <TMRD_1 TXSR_60 TRAS_42 TRC_60 TRP_18
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| /rk3399_rockchip-uboot/board/freescale/m547xevb/ |
| H A D | m547xevb.c | 29 sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); in dram_init() local
56 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
57 out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2); in dram_init()
60 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2); in dram_init()
63 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD); in dram_init()
64 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000); in dram_init()
69 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2); in dram_init()
72 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
73 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
75 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE); in dram_init()
[all …]
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| /rk3399_rockchip-uboot/board/freescale/m548xevb/ |
| H A D | m548xevb.c | 29 sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); in dram_init() local
56 out_be32(&sdram->cfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
57 out_be32(&sdram->cfg2, CONFIG_SYS_SDRAM_CFG2); in dram_init()
60 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2); in dram_init()
63 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_EMOD); in dram_init()
64 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE | 0x04000000); in dram_init()
69 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 2); in dram_init()
72 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
73 out_be32(&sdram->ctrl, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
75 out_be32(&sdram->mode, CONFIG_SYS_SDRAM_MODE); in dram_init()
[all …]
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| /rk3399_rockchip-uboot/board/freescale/m5235evb/ |
| H A D | m5235evb.c | 27 sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); in dram_init() local
53 if (!(in_be32(&sdram->dacr0) & SDRAMC_DARCn_RE)) { in dram_init()
57 out_be16(&sdram->dcr, SDRAMC_DCR_RTIM_9CLKS | in dram_init()
62 out_be32(&sdram->dacr0, in dram_init()
69 out_be32(&sdram->dmr0, in dram_init()
74 setbits_be32(&sdram->dacr0, SDRAMC_DARCn_IP); in dram_init()
85 setbits_be32(&sdram->dacr0, SDRAMC_DARCn_RE); in dram_init()
93 setbits_be32(&sdram->dacr0, SDRAMC_DARCn_IMRS); in dram_init()
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| /rk3399_rockchip-uboot/board/freescale/m54455evb/ |
| H A D | m54455evb.c | 35 sdramc_t *sdram = (sdramc_t *)(MMAP_SDRAM); in dram_init() local
49 out_be32(&sdram->sdcs0, CONFIG_SYS_SDRAM_BASE | i); in dram_init()
50 out_be32(&sdram->sdcs1, CONFIG_SYS_SDRAM_BASE1 | i); in dram_init()
52 out_be32(&sdram->sdcfg1, CONFIG_SYS_SDRAM_CFG1); in dram_init()
53 out_be32(&sdram->sdcfg2, CONFIG_SYS_SDRAM_CFG2); in dram_init()
56 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2); in dram_init()
59 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_EMOD | 0x408); in dram_init()
60 out_be32(&sdram->sdmr, CONFIG_SYS_SDRAM_MODE | 0x300); in dram_init()
65 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 2); in dram_init()
68 out_be32(&sdram->sdcr, CONFIG_SYS_SDRAM_CTRL | 4); in dram_init()
[all …]
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| /rk3399_rockchip-uboot/arch/arm/cpu/armv8/ |
| H A D | u-boot-spl.lds | 17 MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR,
79 } >.sdram
84 } >.sdram
88 } >.sdram
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| /rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra20/ |
| H A D | warmboot.c | 125 struct sdram_params sdram; in warmboot_save_sdram_params() local
142 memcpy(&sdram, in warmboot_save_sdram_params()
144 sizeof(sdram)); in warmboot_save_sdram_params()
168 scratch2.memory_type = sdram.memory_type; in warmboot_save_sdram_params()
175 scratch4.emc_clock_divider = sdram.emc_clock_divider; in warmboot_save_sdram_params()
182 scratch24.emc_pin_program_wait = sdram.emc_pin_program_wait; in warmboot_save_sdram_params()
183 scratch24.emc_auto_cal_wait = sdram.emc_auto_cal_wait; in warmboot_save_sdram_params()
184 scratch24.warmboot_wait = sdram.warm_boot_wait; in warmboot_save_sdram_params()
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| /rk3399_rockchip-uboot/arch/m68k/cpu/mcf532x/ |
| H A D | speed.c | 144 sdram_t *sdram = (sdram_t *)(MMAP_SDRAM); in clock_pll() local
200 if (in_be32(&sdram->ctrl) & SDRAMC_SDCR_REF) in clock_pll()
201 clrbits_be32(&sdram->ctrl, SDRAMC_SDCR_CKE); in clock_pll()
233 if (in_be32(&sdram->ctrl) & SDRAMC_SDCR_REF) in clock_pll()
234 setbits_be32(&sdram->ctrl, SDRAMC_SDCR_CKE); in clock_pll()
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| /rk3399_rockchip-uboot/arch/arm/mach-at91/arm926ejs/ |
| H A D | u-boot-spl.lds | 10 MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
50 } >.sdram
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| /rk3399_rockchip-uboot/arch/arm/cpu/arm1136/ |
| H A D | u-boot-spl.lds | 14 MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
50 } >.sdram
|
| /rk3399_rockchip-uboot/arch/arm/mach-at91/ |
| H A D | Makefile | 7 obj-$(CONFIG_AT91SAM9260) += sdram.o spl_at91.o
8 obj-$(CONFIG_AT91SAM9G20) += sdram.o spl_at91.o
|
| /rk3399_rockchip-uboot/arch/arm/mach-omap2/ |
| H A D | u-boot-spl.lds | 14 MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
58 } >.sdram
|
| /rk3399_rockchip-uboot/arch/arm/mach-at91/armv7/ |
| H A D | u-boot-spl.lds | 17 MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
59 } >.sdram
|
| /rk3399_rockchip-uboot/arch/arm/mach-zynq/ |
| H A D | u-boot-spl.lds | 13 MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
57 } > .sdram
|
| /rk3399_rockchip-uboot/arch/arm/cpu/armv7/sunxi/ |
| H A D | u-boot-spl.lds | 19 MEMORY { .sdram : ORIGIN = CONFIG_SPL_BSS_START_ADDR, \
57 } > .sdram
|
| /rk3399_rockchip-uboot/drivers/ram/rockchip/ |
| H A D | Kconfig | 14 bool "Enable rockchip sdram common driver"
17 This enable sdram common driver
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| /rk3399_rockchip-uboot/board/freescale/mpc8315erdb/ |
| H A D | Makefile | 8 obj-y := mpc8315erdb.o sdram.o
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| /rk3399_rockchip-uboot/board/freescale/mpc8308rdb/ |
| H A D | Makefile | 10 obj-y := mpc8308rdb.o sdram.o
|