| /rk3399_rockchip-uboot/drivers/usb/musb/ |
| H A D | musb_udc.c | 119 w = readw(&musbr->ep[0].ep0.csr0); in musb_db_regs() 128 w = readw(&musbr->frame); in musb_db_regs() 134 w = readw(&musbr->ep[1].epN.rxmaxp); in musb_db_regs() 137 w = readw(&musbr->ep[1].epN.rxcsr); in musb_db_regs() 140 w = readw(&musbr->ep[1].epN.txmaxp); in musb_db_regs() 143 w = readw(&musbr->ep[1].epN.txcsr); in musb_db_regs() 161 readw(&musbr->intrrx); in musb_peri_softconnect() 162 readw(&musbr->intrtx); in musb_peri_softconnect() 212 csr0 = readw(&musbr->ep[0].ep0.csr0); in musb_peri_ep0_stall() 223 csr0 = readw(&musbr->ep[0].ep0.csr0); in musb_peri_ep0_ack_req() [all …]
|
| H A D | musb_hcd.c | 44 csr = readw(&musbr->txcsr); in write_toggle() 59 csr = readw(&musbr->txcsr); in write_toggle() 66 csr = readw(&musbr->rxcsr); in write_toggle() 86 csr = readw(&musbr->txcsr); in check_stall() 94 csr = readw(&musbr->txcsr); in check_stall() 101 csr = readw(&musbr->rxcsr); in check_stall() 123 csr = readw(&musbr->txcsr); in wait_until_ep0_ready() 190 csr = readw(&musbr->txcsr); in wait_until_txep_ready() 222 csr = readw(&musbr->rxcsr); in wait_until_rxep_ready() 252 csr = readw(&musbr->txcsr); in ctrlreq_setup_phase() [all …]
|
| H A D | musb_core.c | 83 csr = readw(&musbr->txcsr); in musb_configure_ep() 96 csr = readw(&musbr->rxcsr); in musb_configure_ep()
|
| /rk3399_rockchip-uboot/arch/sh/lib/ |
| H A D | time_sh2.c | 24 writew(readw(CMSTR) | 0x01, CMSTR); in cmt_timer_start() 29 writew(readw(CMSTR) & ~0x01, CMSTR); in cmt_timer_stop() 36 readw(CMCSR_0); in timer_init() 55 ulong data = readw(CMCNT_0); in get_usec()
|
| H A D | time.c | 51 writew((readw(&tmu->tcr0) & ~TCR_TPSC) | tmu_bit, &tmu->tcr0); in timer_init()
|
| /rk3399_rockchip-uboot/board/ronetix/pm9263/ |
| H A D | pm9263.c | 179 readw(PSRAM_CTRL_REG); in pm9263_lcd_hw_psram_init() 180 readw(PSRAM_CTRL_REG); in pm9263_lcd_hw_psram_init() 185 readw(PSRAM_CTRL_REG); in pm9263_lcd_hw_psram_init() 186 readw(PSRAM_CTRL_REG); in pm9263_lcd_hw_psram_init() 200 if ((readw(PHYS_PSRAM) != 0x1234) || (readw(PHYS_PSRAM+2) != 0x5678)) { in pm9263_lcd_hw_psram_init() 205 readw(PSRAM_CTRL_REG); in pm9263_lcd_hw_psram_init() 206 readw(PSRAM_CTRL_REG); in pm9263_lcd_hw_psram_init() 214 if ((readw(PHYS_PSRAM) != 0x1234) in pm9263_lcd_hw_psram_init() 215 || (readw(PHYS_PSRAM + 2) != 0x5678)) in pm9263_lcd_hw_psram_init()
|
| /rk3399_rockchip-uboot/drivers/i2c/ |
| H A D | adi_i2c.c | 94 int_stat = readw(&twi->int_stat); in wait_for_completion() 105 ctl = readw(&twi->master_ctl); in wait_for_completion() 116 *(msg->buf++) = readw(&twi->rcv_data8); in wait_for_completion() 119 ctl = readw(&twi->master_ctl); in wait_for_completion() 130 ctl = readw(&twi->master_ctl); in wait_for_completion() 167 while (readw(&twi->master_stat) & BUSBUSY) in i2c_transfer() 194 ctl = readw(&twi->master_ctl); in i2c_transfer() 203 ctl = readw(&twi->master_ctl) & ~MEN; in i2c_transfer() 205 ctl = readw(&twi->control) & ~TWI_ENA; in i2c_transfer() 207 ctl = readw(&twi->control) | TWI_ENA; in i2c_transfer()
|
| H A D | omap24xx_i2c.c | 126 while ((stat = readw(&i2c_base->stat) & I2C_STAT_BB) && timeout--) { 129 while ((stat = readw(&i2c_base->irqstatus_raw) & 157 status = readw(&i2c_base->stat); 160 status = readw(&i2c_base->irqstatus_raw); 191 stat = readw(&i2c_base->stat); 271 orgsystest = readw(&i2c_base->systest); 316 if (readw(&i2c_base->con) & I2C_CON_EN) { 325 while (!(readw(&i2c_base->syss) & I2C_SYSS_RDONE) && timeout--) { 371 if (chip == readw(&i2c_base->oa))
|
| /rk3399_rockchip-uboot/board/compulab/common/ |
| H A D | omap3_smc911x.c | 39 writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); in cl_omap3_smc911x_setup_net_chip_gmpc() 42 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); in cl_omap3_smc911x_setup_net_chip_gmpc() 45 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, in cl_omap3_smc911x_setup_net_chip_gmpc()
|
| /rk3399_rockchip-uboot/arch/x86/cpu/broadwell/ |
| H A D | iobp.c | 36 u16 status = readw(RCB_REG(IOBPS)); in iobp_poll() 74 status = readw(RCB_REG(IOBPS)); in pch_iobp_trans_finish() 140 *resp = (readw(RCB_REG(IOBPS)) & IOBPS_TX_MASK) >> 1; in pch_iobp_exec()
|
| /rk3399_rockchip-uboot/arch/microblaze/include/asm/ |
| H A D | io.h | 25 #define readw(addr) \ macro 42 #define inw(addr) readw (addr) 50 #define in_be16(addr) readw (addr) 68 #define __raw_readw readw
|
| /rk3399_rockchip-uboot/include/ |
| H A D | iotrace.h | 27 #undef readw 28 #define readw(addr) iotrace_readw((const void *)(addr)) macro
|
| H A D | wait_bit.h | 75 BUILD_WAIT_FOR_BIT(le16, u16, readw)
|
| /rk3399_rockchip-uboot/board/isee/igep00x0/ |
| H A D | igep00x0.c | 121 writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); in setup_net_chip() 123 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); in setup_net_chip() 125 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, in setup_net_chip()
|
| /rk3399_rockchip-uboot/arch/xtensa/include/asm/ |
| H A D | io.h | 38 #define readw(addr) \ macro 47 #define __raw_readw readw 62 #define inw(port) readw((u16 *)((port)))
|
| /rk3399_rockchip-uboot/drivers/mmc/ |
| H A D | mv_sdhci.c | 54 writew(readw(ata) | (MMC_CARD | MMC_WIDTH), ata); in mv_sdhci_writeb() 56 writew(readw(ata) & ~(MMC_CARD | MMC_WIDTH), ata); in mv_sdhci_writeb()
|
| /rk3399_rockchip-uboot/drivers/phy/marvell/ |
| H A D | comphy_core.c | 71 debug("old value = %#06x ==> ", readw(addr)); in reg_set16() 73 debug("new value %#06x\n", readw(addr)); in reg_set16() 80 reg_data = readw(addr); in reg_set_silent16()
|
| /rk3399_rockchip-uboot/board/ti/evm/ |
| H A D | evm.c | 261 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); in setup_net_chip() 263 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); in setup_net_chip() 265 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, in setup_net_chip()
|
| /rk3399_rockchip-uboot/board/overo/ |
| H A D | overo.c | 321 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); in setup_net_chip() 323 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); in setup_net_chip() 325 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, in setup_net_chip()
|
| /rk3399_rockchip-uboot/board/freescale/mx31ads/ |
| H A D | mx31ads.c | 67 readw(CS4_BASE + 4); in board_early_init_f()
|
| /rk3399_rockchip-uboot/include/linux/ |
| H A D | io.h | 19 return readw(addr); in ioread16()
|
| H A D | iopoll.h | 48 readx_poll_timeout(readw, addr, val, cond, timeout_us)
|
| /rk3399_rockchip-uboot/drivers/mtd/nand/raw/ |
| H A D | atmel_nand.c | 201 si[i] = readw(alpha_to + i * j) ^ si[i]; in pmecc_substitute() 211 tmp = readw(index_of + si[j]); in pmecc_substitute() 213 si[i] = readw(alpha_to + tmp); in pmecc_substitute() 345 a = readw(index_of + dmu[i]); in pmecc_get_sigma() 346 b = readw(index_of + dmu[ro]); in pmecc_get_sigma() 347 c = readw(index_of + smu[ro * num + k]); in pmecc_get_sigma() 349 a = readw(alpha_to + tmp % cw_len); in pmecc_get_sigma() 371 a = readw(index_of + in pmecc_get_sigma() 374 c = readw(index_of + b); in pmecc_get_sigma() 377 dmu[i + 1] = readw(alpha_to + tmp) ^ in pmecc_get_sigma() [all …]
|
| /rk3399_rockchip-uboot/drivers/net/ |
| H A D | fec_mxc.c | 469 while (readw(&fec->eth->miigsk_enr) & MIIGSK_ENR_READY) in fec_open() 480 while ((readw(&fec->eth->miigsk_enr) & MIIGSK_ENR_READY) == 0) { in fec_open() 695 status = readw(&fec->tbd_base[fec->tbd_index].status) & FEC_TBD_WRAP; in fecmxc_send() 765 if (!(readw(&fec->tbd_base[fec->tbd_index].status) & in fecmxc_send() 775 readw(&fec->tbd_base[fec->tbd_index].status), in fecmxc_send() 866 bd_status = readw(&rbd->status); in fecmxc_recv() 871 ((readw(&rbd->data_length) - 4) > 14)) { in fecmxc_recv() 874 frame_length = readw(&rbd->data_length) - 4; in fecmxc_recv()
|
| /rk3399_rockchip-uboot/board/renesas/sh7752evb/ |
| H A D | sh7752evb.c | 86 writew(readw(&gpio->pgcr) | 0x0004, &gpio->pgcr); in init_gether_mdio() 166 writew(readw(&gpio->pgcr) | 0x0040, &gpio->pgcr); in board_mmc_init()
|