1ea0364f1SPeter Tyser /* 2ea0364f1SPeter Tyser * (C) Copyright 2009 3ea0364f1SPeter Tyser * Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> 4ea0364f1SPeter Tyser * 573f35e0bSNobuhiro Iwamatsu * (C) Copyright 2007-2012 6ea0364f1SPeter Tyser * Nobobuhiro Iwamatsu <iwamatsu@nigauri.org> 7ea0364f1SPeter Tyser * 8ea0364f1SPeter Tyser * (C) Copyright 2003 9ea0364f1SPeter Tyser * Wolfgang Denk, DENX Software Engineering, wd@denx.de. 10ea0364f1SPeter Tyser * 111a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 12ea0364f1SPeter Tyser */ 13ea0364f1SPeter Tyser 14ea0364f1SPeter Tyser #include <common.h> 15ea0364f1SPeter Tyser #include <asm/processor.h> 16ea0364f1SPeter Tyser #include <asm/io.h> 1773f35e0bSNobuhiro Iwamatsu #include <sh_tmu.h> 1873f35e0bSNobuhiro Iwamatsu 19861bd4bcSNobuhiro Iwamatsu #define TCR_TPSC 0x07 20861bd4bcSNobuhiro Iwamatsu 2173f35e0bSNobuhiro Iwamatsu static struct tmu_regs *tmu = (struct tmu_regs *)TMU_BASE; 22ea0364f1SPeter Tyser get_tbclk(void)23d4430426SNobuhiro Iwamatsuunsigned long get_tbclk(void) 24d4430426SNobuhiro Iwamatsu { 25b8f16086SNobuhiro Iwamatsu u16 tmu_bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1; 26b8f16086SNobuhiro Iwamatsu return get_tmu0_clk_rate() >> ((tmu_bit + 1) * 2); 27d4430426SNobuhiro Iwamatsu } 28d4430426SNobuhiro Iwamatsu timer_read_counter(void)29*1b5cf954SRob Herringunsigned long timer_read_counter(void) 30ea0364f1SPeter Tyser { 31*1b5cf954SRob Herring return ~readl(&tmu->tcnt0); 32ea0364f1SPeter Tyser } 33ea0364f1SPeter Tyser tmu_timer_start(unsigned int timer)34ea0364f1SPeter Tyserstatic void tmu_timer_start(unsigned int timer) 35ea0364f1SPeter Tyser { 36ea0364f1SPeter Tyser if (timer > 2) 37ea0364f1SPeter Tyser return; 3873f35e0bSNobuhiro Iwamatsu writeb(readb(&tmu->tstr) | (1 << timer), &tmu->tstr); 39ea0364f1SPeter Tyser } 40ea0364f1SPeter Tyser tmu_timer_stop(unsigned int timer)41ea0364f1SPeter Tyserstatic void tmu_timer_stop(unsigned int timer) 42ea0364f1SPeter Tyser { 43ea0364f1SPeter Tyser if (timer > 2) 44ea0364f1SPeter Tyser return; 4573f35e0bSNobuhiro Iwamatsu writeb(readb(&tmu->tstr) & ~(1 << timer), &tmu->tstr); 46ea0364f1SPeter Tyser } 47ea0364f1SPeter Tyser timer_init(void)48ea0364f1SPeter Tyserint timer_init(void) 49ea0364f1SPeter Tyser { 50b8f16086SNobuhiro Iwamatsu u16 tmu_bit = (ffs(CONFIG_SYS_TMU_CLK_DIV) >> 1) - 1; 51b8f16086SNobuhiro Iwamatsu writew((readw(&tmu->tcr0) & ~TCR_TPSC) | tmu_bit, &tmu->tcr0); 52ea0364f1SPeter Tyser 53ea0364f1SPeter Tyser tmu_timer_stop(0); 54ea0364f1SPeter Tyser tmu_timer_start(0); 55ea0364f1SPeter Tyser 56ea0364f1SPeter Tyser return 0; 57ea0364f1SPeter Tyser } 58ea0364f1SPeter Tyser 59