Searched refs:pll_base (Results 1 – 7 of 7) sorted by relevance
| /rk3399_rockchip-uboot/arch/arm/mach-davinci/ |
| H A D | cpu.c | 61 unsigned int pll_base; in clk_get() local
69 pll_base = (unsigned int)davinci_pllc1_regs; in clk_get()
71 pll_base = (unsigned int)davinci_pllc0_regs; in clk_get()
79 pre_div = (readl(pll_base + PLLC_PREDIV) & in clk_get()
81 pllm = readl(pll_base + PLLC_PLLM) + 1; in clk_get()
89 post_div = (readl(pll_base + PLLC_POSTDIV) & in clk_get()
97 pll_out /= (readl(pll_base + sysdiv[id - 1]) & in clk_get()
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| /rk3399_rockchip-uboot/arch/arm/mach-tegra/ |
| H A D | cpu.c | 180 if (readl(&pll->pll_base) & PLL_ENABLE_MASK) { in pllx_set_rate()
190 writel(reg, &pll->pll_base); in pllx_set_rate()
208 reg = readl(&pll->pll_base); in pllx_set_rate()
210 writel(reg, &pll->pll_base); in pllx_set_rate()
221 reg = readl(&pll->pll_base); in pllx_set_rate()
223 writel(reg, &pll->pll_base); in pllx_set_rate()
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| H A D | clock.c | 102 data = readl(&pll->pll_base); in clock_ll_read_pll()
154 writel(data, &pll->pll_base); in clock_start_pll()
157 writel(data, &simple_pll->pll_base); in clock_start_pll()
550 base = readl(&pll->pll_base); in clock_get_rate()
597 base_reg = readl(&pll->pll_base); in clock_set_rate()
616 if (base_reg != readl(&pll->pll_base)) in clock_set_rate()
624 writel(base_reg, &pll->pll_base); in clock_set_rate()
634 writel(base_reg, &pll->pll_base); in clock_set_rate()
638 writel(base_reg, &pll->pll_base); in clock_set_rate()
676 u32 reg = readl(&pll->pll_base); in clock_verify()
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| /rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra20/ |
| H A D | warmboot_avp.c | 189 writel(pllx_base.word, &clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base); in wb_start()
192 writel(pllx_base.word, &clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base); in wb_start()
194 writel(pllx_base.word, &clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base); in wb_start()
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra/ |
| H A D | clk_rst.h | 13 uint pll_base; /* the control register */ member
21 uint pll_base; /* the control register */ member
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| /rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra124/ |
| H A D | cpu.c | 55 reg = readl(&clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base); in enable_cpu_clocks()
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| /rk3399_rockchip-uboot/arch/arm/mach-tegra/tegra114/ |
| H A D | cpu.c | 62 reg = readl(&clkrst->crc_pll_simple[SIMPLE_PLLX].pll_base); in enable_cpu_clocks()
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