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/rk3399_rockchip-uboot/doc/device-tree-bindings/clock/
H A Drockchip,rk3368-dmc.txt9 (c) a memory-schedule (i.e. mapping from physical addresses to the address
45 controls the decoding of physical addresses to DRAM addressing (i.e. how
46 the physical address maps onto the address pins/chip-select of the device)
H A Dmicrochip,pic32-clock.txt14 - reg: physical base address of the controller and length of memory mapped
/rk3399_rockchip-uboot/doc/
H A DREADME.mpc85xx-spin-table11 the physical address of this page, with WIMGE=0b01010. Core 0 also enables boot
15 core 0 puts the physical address of the spin table (which is in release.S and
21 the new space. The new TLB covers the physical address of the spin table page,
H A DREADME.ubispl20 The maximum physical erase block size. Either a compile time
25 The maximum physical erase block count. Either a compile time
87 * MY_NAND_NR_SPL_PEBS is the number of physical erase blocks
H A DREADME.bus_vcxk33 defines the physical alignment of a pixel row
/rk3399_rockchip-uboot/doc/device-tree-bindings/gpio/
H A Dnvidia,tegra186-gpio.txt15 register set. These registers exist in a single contiguous block of physical
25 controllers, these registers are exposed via multiple "physical aliases" in
28 just one of these physical aliases.
76 a) The single physical alias that this OS should use.
77 b) All physical aliases that exist in the controller. This is
79 the physical aliases.
84 Array of (physical base address, length) tuples.
/rk3399_rockchip-uboot/doc/device-tree-bindings/serial/
H A Dqca,ar9330-uart.txt7 - reg: Specifies the physical base address of the controller and
/rk3399_rockchip-uboot/doc/device-tree-bindings/timer/
H A Daltera_timer.txt6 - reg : Specifies base physical address and size of the registers.
/rk3399_rockchip-uboot/doc/device-tree-bindings/pwm/
H A Dtegra20-pwm.txt7 - reg: physical base address and length of the controller's registers
/rk3399_rockchip-uboot/drivers/
H A DKconfig116 bool "Custom physical to bus address mapping"
118 Some SoCs use a different address map for CPU physical addresses and
/rk3399_rockchip-uboot/include/zfs/
H A Dspa.h203 #define BP_SET_BIRTH(bp, logical, physical) \ argument
206 (bp)->blk_phys_birth = ((logical) == (physical) ? 0 : (physical)); \
/rk3399_rockchip-uboot/drivers/scsi/
H A DKconfig6 hard drives and optical drives. The SCSI standards define physical
/rk3399_rockchip-uboot/doc/device-tree-bindings/i2c/
H A Di2c-at91.txt7 - reg: physical base address of the controller and length of memory mapped
/rk3399_rockchip-uboot/drivers/led/
H A DKconfig114 to a physical LED is the responsibility of the __led_* function.
148 the value to a physical LED is the responsibility of the __led_*
183 the value to a physical LED is the responsibility of the __led_*
218 the value to a physical LED is the responsibility of the __led_*
253 the value to a physical LED is the responsibility of the __led_*
288 the value to a physical LED is the responsibility of the __led_*
/rk3399_rockchip-uboot/doc/device-tree-bindings/video/
H A Datmel-hlcdc.txt6 - reg: physical base address of the controller and length of memory mapped
H A Drockchip-lvds.txt7 - reg: physical base address of the controller and length
/rk3399_rockchip-uboot/arch/arm/dts/
H A Drk3368-px5-evb-u-boot.dtsi23 * affects the physical-address to device-address mapping.
H A Drk3368-lion-u-boot.dtsi44 * affects the physical-address to device-address mapping.
/rk3399_rockchip-uboot/doc/mvebu/
H A Darmada-8k-memory.txt4 The below desribes the physical memory layout for Marvell's Armada-8k SoC's.
/rk3399_rockchip-uboot/board/freescale/ls1021aiot/
H A DREADME44 The addresses in brackets are physical addresses.
/rk3399_rockchip-uboot/drivers/phy/
H A DKconfig11 devices. PHY devices are dedicated hardware that handle the physical
27 devices. PHY devices are dedicated hardware that handle the physical
/rk3399_rockchip-uboot/doc/device-tree-bindings/thermal/
H A Drockchip-thermal.txt5 - reg : physical base address of the controller and length of memory mapped
/rk3399_rockchip-uboot/doc/device-tree-bindings/exynos/
H A Ddwmmc.txt17 - reg: physical base address of the controller and length of memory mapped
/rk3399_rockchip-uboot/board/freescale/ls1021aqds/
H A DREADME33 - 40-bit physical addressing
100 The addresses in brackets are physical addresses.
/rk3399_rockchip-uboot/board/freescale/ls1021atwr/
H A DREADME33 - 40-bit physical addressing
99 The addresses in brackets are physical addresses.

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