History log of /rk3399_rockchip-uboot/doc/README.mpc85xx-spin-table (Results 1 – 5 of 5)
Revision Date Author Comments
# 57dc53a7 08-Feb-2016 Tom Rini <trini@konsulko.com>

Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-staging


# a187559e 06-Feb-2016 Bin Meng <bmeng.cn@gmail.com>

Use correct spelling of "U-Boot"

Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed

Use correct spelling of "U-Boot"

Correct spelling of "U-Boot" shall be used in all written text
(documentation, comments in source files etc.).

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Heiko Schocher <hs@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>

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# 3e4d27b0 10-Nov-2012 Stefano Babic <sbabic@denx.de>

Merge git://git.denx.de/u-boot


# c7656bab 22-Oct-2012 Tom Rini <trini@ti.com>

Merge branch 'master' of git://www.denx.de/git/u-boot-mpc85xx


# ffd06e02 08-Oct-2012 York Sun <yorksun@freescale.com>

powerpc/mpc85xx: Rewrite spin table to comply with ePAPR v1.1

Move spin table to cached memory to comply with ePAPR v1.1.
Load R3 with 64-bit value if CONFIG_SYS_PPC64 is defined.

'M' bit is set fo

powerpc/mpc85xx: Rewrite spin table to comply with ePAPR v1.1

Move spin table to cached memory to comply with ePAPR v1.1.
Load R3 with 64-bit value if CONFIG_SYS_PPC64 is defined.

'M' bit is set for DDR TLB to maintain cache coherence.

See details in doc/README.mpc85xx-spin-table.

Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>

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