phy: rockchip: add usbdp combo phy driver

This adds a new USBDP combo PHY with Samsung IP block driver.

Porting from Linux develop-5.10 commit ab40e563be81 ("phy: rockchip:
add usbdp combo phy driv

phy: rockchip: add usbdp combo phy driver

This adds a new USBDP combo PHY with Samsung IP block driver.

Porting from Linux develop-5.10 commit ab40e563be81 ("phy: rockchip:
add usbdp combo phy driver").

Change-Id: I241de62e1c19ad7ad0474b6b73898e8ee3a1ef2b
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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phy: Add support for Samsung HDMI/DP Combo PHY

Add a new driver for Samsung HDPTX Combo transmit-PHY IP used
in Rockchip RK3588 SoC. The HDPTX is a PHY hardmacro to
support HDMI and DP interfaces.

phy: Add support for Samsung HDMI/DP Combo PHY

Add a new driver for Samsung HDPTX Combo transmit-PHY IP used
in Rockchip RK3588 SoC. The HDPTX is a PHY hardmacro to
support HDMI and DP interfaces.

Currently, it supports only DP mode.

Change-Id: Iab9a699fd27fd94f0388b2af36f89eaf42c9a62f
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>

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phy: rockchip: select phy by default for rockchip

Signed-off-by: William Wu <william.wu@rock-chips.com>
Change-Id: I7942cf529f03be8c9faf375d703c33e7c9edeeac

drivers: phy: add naneng combphy for rk3568

RK3568 has three combo phys, and PCIe/USB3/SATA/QSGMII controllers
share one pipe interface for each combo phy, here is the diagram of
the complex connect

drivers: phy: add naneng combphy for rk3568

RK3568 has three combo phys, and PCIe/USB3/SATA/QSGMII controllers
share one pipe interface for each combo phy, here is the diagram of
the complex connection.

+----------------+
| | +------+
| USB3 OTG CTRL0 |---->| |
| | | | +------------+
+----------------+ | PIPE | | |
| MUX |---->| Combo PHY0 |
+----------------+ | | | |
| | | | +------------+
| SATA CTRL0 |---->| |
| | +------+
+----------------+

+----------------+
| | +------+
| USB3 HOST CTRL1|---->| |
| | | | +------------+
+----------------+ | PIPE | | |
| MUX |---->| Combo PHY1 |
+----------------+ | | | |
| |---->| | +------------+
| SATA CTRL1 | -->| |
| | | +------+
+----------------+ |
|
+----------------+ |
| | | +------+
| QSGMII CTRL |---->| |
| | | | +------------+
+----------------+ | PIPE | | |
| MUX |---->| Combo PHY2 |
+----------------+ | | | |
| |---->| | +------------+
| SATA CTRL2 | -->| |
| | | +------+
+----------------+ |
|
+----------------+ |
| | |
| PCIe2 1-Lane |---
| |
+----------------+

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I9c035c9df201e3c923c14398e48582e6e877f6fc

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phy: Add Rockchip Synopsys PCIe 3.0 PHY

Change-Id: Ie29e4777f8f0603b779cc3387dc5c4b63336deff
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>

phy: Add driver for Rockchip Naneng eDP Transmitter PHY

DPTPHYT22ULP is designed for chips that perform eDP/DP data
communication while operating at low power consumption.
The main link is a multi-g

phy: Add driver for Rockchip Naneng eDP Transmitter PHY

DPTPHYT22ULP is designed for chips that perform eDP/DP data
communication while operating at low power consumption.
The main link is a multi-gigabit transmitter macro which
enable speed up to 4.0Gbps data transmitter with optimized
power and die size, also it can be easily fabricated and
implemented in a video system. The AUX channel is a halfduplex,
bidirectional channel consisting of one differential pair,
supporting the bit rate of about 1Mbps.

Macro consists of multi-main link transmitter channels,
AUX channel, one PLL and bias-gen unit. The main link
transmitter performs dedicated P2S, clock generator,
driver with preemphasis and self-test. Each of the channels
can be turned off individually.

Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
Change-Id: Ic60d8bb86a53f686e8c46323b58d099c727a36d3

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Merge branch 'thunder-boot' into next-dev

Merge branch 'next-dev' into thunder-boot

Change-Id: I22ac688008080eac49169d752a94b66668f890fc

Conflicts:
drivers/phy/Kconfig
drivers/phy/Makefile

phy: rockchip: add a new driver for type-c phy

This implements the Type-C PHY driver for Rockchip platform
with Cadence IP block.

Change-Id: I4d74aadbae10f743c9daec8f97aadb8458e740fc
Signed-off-by:

phy: rockchip: add a new driver for type-c phy

This implements the Type-C PHY driver for Rockchip platform
with Cadence IP block.

Change-Id: I4d74aadbae10f743c9daec8f97aadb8458e740fc
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: William Wu <william.wu@rock-chips.com>

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phy: rockchip: add a new driver for Rockchip USB3 PHY

This implements the USB3.0 PHY driver for Rockchip platform
with Inno IP block.

Change-Id: I161915cf36fec441822f5f151f017ba8a7ecff9f
Signed-off

phy: rockchip: add a new driver for Rockchip USB3 PHY

This implements the USB3.0 PHY driver for Rockchip platform
with Inno IP block.

Change-Id: I161915cf36fec441822f5f151f017ba8a7ecff9f
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>

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phy: add a new driver for rockchip usb2 phy

This phy driver supports for rockchip SoCs with USB 2.0
PHY consist of Naneng PHY. It can be used for the otg phy
and host phy, typically, otg phy is used

phy: add a new driver for rockchip usb2 phy

This phy driver supports for rockchip SoCs with USB 2.0
PHY consist of Naneng PHY. It can be used for the otg phy
and host phy, typically, otg phy is used for DWC3, and the
host phy is shared between the EHCI and OHCI controllers.

Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Change-Id: I76a8470dbc5ec789e60cee4ec8ad9a56e73c9841

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phy: add a new driver for rockchip usb2 phy

This phy driver supports for rockchip SoCs with USB 2.0
PHY consist of Innosilicon PHY. It can be used for the
PHY with two usb ports, typically, one port

phy: add a new driver for rockchip usb2 phy

This phy driver supports for rockchip SoCs with USB 2.0
PHY consist of Innosilicon PHY. It can be used for the
PHY with two usb ports, typically, one port is used for
DWC2, the other port is shared between the EHCI and OHCI
controllers.

Change-Id: I00634c5fcfd93ed55b8332e27d915ca587bd2783
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>

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Merge git://git.denx.de/u-boot-usb

phy: add a NO-OP phy driver

This driver is used to stub PHY operations in a driver (USB, SATA).
This is useful when the 'client' driver (USB, SATA, ...) uses the PHY
framework and there is no actual

phy: add a NO-OP phy driver

This driver is used to stub PHY operations in a driver (USB, SATA).
This is useful when the 'client' driver (USB, SATA, ...) uses the PHY
framework and there is no actual PHY harwdare to drive.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>

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pipe3: Fix broken dependency

ARCH_OMAP2 has been renamed ARCH_OMAP2PLUS in commit a93fbf4a7892
("ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig")

Signed-off-by: Jean-Jacques H

pipe3: Fix broken dependency

ARCH_OMAP2 has been renamed ARCH_OMAP2PLUS in commit a93fbf4a7892
("ARM: omap2+: rename config to ARCH_OMAP2PLUS and consolidate Kconfig")

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>

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Merge git://git.denx.de/u-boot-dm

drivers: phy: add PIPE3 phy driver

This phy is found on omap platforms with sata capabilities.
Except for the part related to the DM and the PHY framework, the code is
basically a copy paste from ar

drivers: phy: add PIPE3 phy driver

This phy is found on omap platforms with sata capabilities.
Except for the part related to the DM and the PHY framework, the code is
basically a copy paste from arch/arm/mach-omap2/pipe3-phy.c

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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dm: test: Add tests for the generic PHY uclass

Those tests check:
- the ability for a phy-user to get a phy based on its name or its index
- the ability of a phy device (provider) to manage multiple

dm: test: Add tests for the generic PHY uclass

Those tests check:
- the ability for a phy-user to get a phy based on its name or its index
- the ability of a phy device (provider) to manage multiple ports
- the ability to perform operations on the phy (init,deinit,on,off)
- the behavior of the uclass when optional operations are not implemented

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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drivers: phy: add generic PHY framework

The PHY framework provides a set of APIs to control a PHY. This API is
derived from the linux version of the generic PHY framework.
Currently the API supports

drivers: phy: add generic PHY framework

The PHY framework provides a set of APIs to control a PHY. This API is
derived from the linux version of the generic PHY framework.
Currently the API supports init(), deinit(), power_on, power_off() and
reset(). The framework provides a way to get a reference to a phy from the
device-tree.

Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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