1*e3b7599bSSongjun WuI2C for Atmel platforms 2*e3b7599bSSongjun Wu 3*e3b7599bSSongjun WuRequired properties : 4*e3b7599bSSongjun Wu- compatible : Must be "atmel,at91rm9200-i2c", "atmel,at91sam9261-i2c", 5*e3b7599bSSongjun Wu "atmel,at91sam9260-i2c", "atmel,at91sam9g20-i2c", "atmel,at91sam9g10-i2c", 6*e3b7599bSSongjun Wu "atmel,at91sam9x5-i2c", "atmel,sama5d4-i2c" or "atmel,sama5d2-i2c". 7*e3b7599bSSongjun Wu- reg: physical base address of the controller and length of memory mapped 8*e3b7599bSSongjun Wu region. 9*e3b7599bSSongjun Wu- #address-cells = <1>; 10*e3b7599bSSongjun Wu- #size-cells = <0>; 11*e3b7599bSSongjun Wu- clocks: phandles to input clocks. 12*e3b7599bSSongjun Wu 13*e3b7599bSSongjun WuOptional properties: 14*e3b7599bSSongjun Wu- clock-frequency: Desired I2C bus frequency in Hz, default value is 100000. 15*e3b7599bSSongjun Wu- Child nodes conforming to i2c bus binding. 16*e3b7599bSSongjun Wu 17*e3b7599bSSongjun WuExamples : 18*e3b7599bSSongjun Wu 19*e3b7599bSSongjun Wui2c0: i2c@f8028000 { 20*e3b7599bSSongjun Wu compatible = "atmel,sama5d2-i2c"; 21*e3b7599bSSongjun Wu reg = <0xf8028000 0x100>; 22*e3b7599bSSongjun Wu #address-cells = <1>; 23*e3b7599bSSongjun Wu #size-cells = <0>; 24*e3b7599bSSongjun Wu clocks = <&twi0_clk>; 25*e3b7599bSSongjun Wu clock-frequency = <100000>; 26*e3b7599bSSongjun Wu}; 27