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Searched refs:phy_addr (Results 1 – 25 of 82) sorted by relevance

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/rk3399_rockchip-uboot/arch/arm/mach-davinci/
H A Ddp83848.c22 int dp83848_is_phy_connected(int phy_addr) in dp83848_is_phy_connected() argument
26 if (!davinci_eth_phy_read(phy_addr, DP83848_PHYID1_REG, &id1)) in dp83848_is_phy_connected()
28 if (!davinci_eth_phy_read(phy_addr, DP83848_PHYID2_REG, &id2)) in dp83848_is_phy_connected()
37 int dp83848_get_link_speed(int phy_addr) in dp83848_get_link_speed() argument
42 if (!davinci_eth_phy_read(phy_addr, DP83848_STAT_REG, &tmp)) in dp83848_get_link_speed()
48 if (!davinci_eth_phy_read(phy_addr, DP83848_PHY_STAT_REG, &tmp)) in dp83848_get_link_speed()
65 int dp83848_init_phy(int phy_addr) in dp83848_init_phy() argument
69 if (!dp83848_get_link_speed(phy_addr)) { in dp83848_init_phy()
72 ret = dp83848_get_link_speed(phy_addr); in dp83848_init_phy()
76 davinci_eth_phy_write(phy_addr, DP83848_PHY_INTR_CTRL_REG, 0); in dp83848_init_phy()
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H A Dlxt972.c23 int lxt972_is_phy_connected(int phy_addr) in lxt972_is_phy_connected() argument
27 if (!davinci_eth_phy_read(phy_addr, MII_PHYSID1, &id1)) in lxt972_is_phy_connected()
29 if (!davinci_eth_phy_read(phy_addr, MII_PHYSID2, &id2)) in lxt972_is_phy_connected()
38 int lxt972_get_link_speed(int phy_addr) in lxt972_get_link_speed() argument
43 if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_STAT2, &stat1)) in lxt972_get_link_speed()
49 if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp)) in lxt972_get_link_speed()
54 davinci_eth_phy_write(phy_addr, PHY_LXT971_DIG_CFG, tmp); in lxt972_get_link_speed()
56 if (!davinci_eth_phy_read(phy_addr, PHY_LXT971_DIG_CFG, &tmp)) in lxt972_get_link_speed()
73 int lxt972_init_phy(int phy_addr) in lxt972_init_phy() argument
77 if (!lxt972_get_link_speed(phy_addr)) { in lxt972_init_phy()
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H A Dksz8873.c25 int ksz8873_is_phy_connected(int phy_addr) in ksz8873_is_phy_connected() argument
29 return davinci_eth_phy_read(phy_addr, MII_PHYSID1, &dummy); in ksz8873_is_phy_connected()
32 int ksz8873_get_link_speed(int phy_addr) in ksz8873_get_link_speed() argument
44 int ksz8873_init_phy(int phy_addr) in ksz8873_init_phy() argument
50 int ksz8873_auto_negotiate(int phy_addr) in ksz8873_auto_negotiate() argument
52 return dp83848_get_link_speed(phy_addr); in ksz8873_auto_negotiate()
H A Det1011c.c26 int et1011c_get_link_speed(int phy_addr) in et1011c_get_link_speed() argument
30 if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &data) && (data & 0x04)) { in et1011c_get_link_speed()
31 davinci_eth_phy_read(phy_addr, MII_PHY_CONFIG_REG, &data); in et1011c_get_link_speed()
33 davinci_eth_phy_write(phy_addr, MII_PHY_CONFIG_REG, in et1011c_get_link_speed()
/rk3399_rockchip-uboot/arch/arm/mach-davinci/include/mach/
H A Demac_defs.h74 int ksz8873_is_phy_connected(int phy_addr);
75 int ksz8873_get_link_speed(int phy_addr);
76 int ksz8873_init_phy(int phy_addr);
77 int ksz8873_auto_negotiate(int phy_addr);
80 int lxt972_is_phy_connected(int phy_addr);
81 int lxt972_get_link_speed(int phy_addr);
82 int lxt972_init_phy(int phy_addr);
83 int lxt972_auto_negotiate(int phy_addr);
86 int dp83848_is_phy_connected(int phy_addr);
87 int dp83848_get_link_speed(int phy_addr);
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/rk3399_rockchip-uboot/drivers/net/phy/
H A Dmv88e6352.c33 static int sw_wait_rdy(const char *devname, u8 phy_addr) in sw_wait_rdy() argument
42 ret = miiphy_read(devname, phy_addr, COMMAND_REG, &command); in sw_wait_rdy()
57 static int sw_reg_read(const char *devname, u8 phy_addr, u8 port, in sw_reg_read() argument
63 ret = sw_wait_rdy(devname, phy_addr); in sw_reg_read()
70 ret = miiphy_write(devname, phy_addr, COMMAND_REG, command); in sw_reg_read()
74 ret = sw_wait_rdy(devname, phy_addr); in sw_reg_read()
78 ret = miiphy_read(devname, phy_addr, DATA_REG, data); in sw_reg_read()
83 static int sw_reg_write(const char *devname, u8 phy_addr, u8 port, in sw_reg_write() argument
89 ret = sw_wait_rdy(devname, phy_addr); in sw_reg_write()
94 ret = miiphy_write(devname, phy_addr, DATA_REG, data); in sw_reg_write()
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/rk3399_rockchip-uboot/board/freescale/t104xrdb/
H A Deth.c24 int phy_addr = 0; in board_eth_init() local
71 phy_addr = CONFIG_SYS_SGMII1_PHY_ADDR; in board_eth_init()
73 phy_addr = CONFIG_SYS_SGMII2_PHY_ADDR; in board_eth_init()
75 phy_addr = CONFIG_SYS_SGMII3_PHY_ADDR; in board_eth_init()
76 fm_info_set_phy_address(i, phy_addr); in board_eth_init()
81 phy_addr = CONFIG_SYS_RGMII1_PHY_ADDR; in board_eth_init()
83 phy_addr = CONFIG_SYS_RGMII2_PHY_ADDR; in board_eth_init()
84 fm_info_set_phy_address(i, phy_addr); in board_eth_init()
112 phy_addr = CONFIG_SYS_FM1_QSGMII11_PHY_ADDR + i; in board_eth_init()
116 vsc9953_port_info_set_phy_address(i, phy_addr); in board_eth_init()
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/rk3399_rockchip-uboot/drivers/net/
H A Ddavinci_emac.c61 #define emac_gigabit_enable(phy_addr) davinci_eth_gigabit_enable(phy_addr) argument
63 #define emac_gigabit_enable(phy_addr) /* no gigabit to enable */ argument
73 static int gen_init_phy(int phy_addr);
74 static int gen_is_phy_connected(int phy_addr);
75 static int gen_get_link_speed(int phy_addr);
76 static int gen_auto_negotiate(int phy_addr);
207 int davinci_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data) in davinci_eth_phy_read() argument
217 ((phy_addr & 0x1f) << 16), in davinci_eth_phy_read()
233 int davinci_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data) in davinci_eth_phy_write() argument
242 ((phy_addr & 0x1f) << 16) | in davinci_eth_phy_write()
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H A Dftgmac100.c39 int phy_addr; member
45 static int ftgmac100_mdiobus_read(struct eth_device *dev, int phy_addr, in ftgmac100_mdiobus_read() argument
57 phycr |= FTGMAC100_PHYCR_PHYAD(phy_addr) in ftgmac100_mdiobus_read()
80 static int ftgmac100_mdiobus_write(struct eth_device *dev, int phy_addr, in ftgmac100_mdiobus_write() argument
93 phycr |= FTGMAC100_PHYCR_PHYAD(phy_addr) in ftgmac100_mdiobus_write()
107 "phy_addr: %x\n", phy_addr); in ftgmac100_mdiobus_write()
144 ftgmac100_phy_write(dev, priv->phy_addr, MII_ADVERTISE, adv); in ftgmac100_phy_reset()
148 ftgmac100_phy_write(dev, priv->phy_addr, in ftgmac100_phy_reset()
152 ftgmac100_phy_read(dev, priv->phy_addr, MII_BMSR, &status); in ftgmac100_phy_reset()
174 int phy_addr; in ftgmac100_phy_init() local
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H A Dmcfmii.c143 return info->phy_addr; in mii_discover_phy()
237 info->phy_addr = mii_discover_phy(dev); in __mii_init()
243 miiphy_read(dev->name, info->phy_addr, MII_BMCR, &status); in __mii_init()
254 miiphy_read(dev->name, info->phy_addr, MII_BMSR, &status); in __mii_init()
265 info->dup_spd = miiphy_duplex(dev->name, info->phy_addr) << 16; in __mii_init()
266 info->dup_spd |= miiphy_speed(dev->name, info->phy_addr); in __mii_init()
H A Ddnet.c31 unsigned short phy_addr; member
75 dnet->phy_addr, reg, value); in dnet_mdio_write()
88 tmp |= (dnet->phy_addr << 8); in dnet_mdio_write()
114 value = (dnet->phy_addr << 8); in dnet_mdio_read()
128 dnet->phy_addr, reg, value); in dnet_mdio_read()
251 dnet->phy_addr = i; in dnet_phy_init()
359 int dnet_eth_initialize(int id, void *regs, unsigned int phy_addr) in dnet_eth_initialize() argument
375 dnet->phy_addr = phy_addr; in dnet_eth_initialize()
H A Duli526x.c137 u8 phy_addr; member
347 uli_phy_write(db->ioaddr, db->phy_addr, 0, 0x8000, db->chip_id); in uli526x_disable()
379 db->phy_addr = 1; in uli526x_init()
385 db->phy_addr = phy_tmp; in uli526x_init()
392 printf("%s(): db->phy_addr= 0x%x\n", __FUNCTION__, db->phy_addr); in uli526x_init()
403 db->phy_addr, 0, db->chip_id); in uli526x_init()
405 uli_phy_write(db->ioaddr, db->phy_addr, 0, in uli526x_init()
780 db->phy_addr, 4, db->chip_id) & ~0x01e0; in uli526x_set_phyxcer()
801 uli_phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, db->chip_id); in uli526x_set_phyxcer()
804 uli_phy_write(db->ioaddr, db->phy_addr, 0, 0x1200, db->chip_id); in uli526x_set_phyxcer()
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H A Dtsi108_eth.c424 unsigned int phy_addr, unsigned int phy_reg);
426 unsigned int phy_addr,
433 static void dump_phy_regs (unsigned int phy_addr) in dump_phy_regs() argument
437 printf ("PHY %d registers\n", phy_addr); in dump_phy_regs()
439 printf ("%2d 0x%04x\n", i, read_phy (ETH_BASE, phy_addr, i)); in dump_phy_regs()
551 unsigned int phy_addr, unsigned int phy_reg) in read_phy() argument
557 reg_MII_MGMT_ADDRESS(base) = (phy_addr << 8) | phy_reg; in read_phy()
580 unsigned int phy_addr, in write_phy() argument
585 reg_MII_MGMT_ADDRESS(base) = (phy_addr << 8) | phy_reg; in write_phy()
601 unsigned long phy_addr; in marvell_88e_phy_config() local
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H A Ddavinci_emac.h294 int davinci_eth_phy_read(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t *data);
295 int davinci_eth_phy_write(u_int8_t phy_addr, u_int8_t reg_num, u_int16_t data);
299 int (*init)(int phy_addr);
300 int (*is_phy_connected)(int phy_addr);
301 int (*get_link_speed)(int phy_addr);
302 int (*auto_negotiate)(int phy_addr);
/rk3399_rockchip-uboot/board/ti/ks2_evm/
H A Dboard_k2e.c100 .phy_addr = 0,
108 .phy_addr = 1,
116 .phy_addr = 2,
124 .phy_addr = 3,
132 .phy_addr = 4,
140 .phy_addr = 5,
148 .phy_addr = 6,
156 .phy_addr = 7,
H A Dboard_k2l.c95 .phy_addr = 0,
103 .phy_addr = 1,
111 .phy_addr = 2,
119 .phy_addr = 3,
H A Dboard_k2hk.c107 .phy_addr = 0,
115 .phy_addr = 1,
123 .phy_addr = 2,
131 .phy_addr = 3,
/rk3399_rockchip-uboot/include/linux/usb/
H A Dphy-rockchip-naneng-combphy.h10 int rockchip_combphy_usb3_uboot_init(fdt_addr_t phy_addr);
12 int rockchip_combphy_usb3_uboot_init(fdt_addr_t phy_addr) in rockchip_combphy_usb3_uboot_init() argument
H A Dphy-rockchip-usbdp.h12 int rockchip_u3phy_uboot_init(fdt_addr_t phy_addr);
14 static inline int rockchip_u3phy_uboot_init(fdt_addr_t phy_addr) in rockchip_u3phy_uboot_init() argument
/rk3399_rockchip-uboot/board/freescale/t1040qds/
H A Deth.c445 int phy_addr; in board_eth_init() local
506 phy_addr = 0; in board_eth_init()
516 phy_addr = CONFIG_SYS_FM1_QSGMII21_PHY_ADDR + in board_eth_init()
529 phy_addr = CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR in board_eth_init()
532 phy_addr = CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR; in board_eth_init()
542 phy_addr = CONFIG_SYS_FM1_QSGMII11_PHY_ADDR + in board_eth_init()
551 phy_addr = CONFIG_SYS_FM1_DTSEC1_RISER_PHY_ADDR in board_eth_init()
582 vsc9953_port_info_set_phy_address(i, phy_addr); in board_eth_init()
/rk3399_rockchip-uboot/include/
H A Dmv88e6352.h72 int mv88e_sw_reset(const char *devname, u8 phy_addr);
73 int mv88e_sw_program(const char *devname, u8 phy_addr,
/rk3399_rockchip-uboot/drivers/net/ldpaa_eth/
H A Dldpaa_wriop.c29 dpmac_info[dpmac_id].phy_addr = -1; in wriop_init_dpmac()
113 dpmac_info[i].phy_addr = address; in wriop_set_phy_address()
123 return dpmac_info[i].phy_addr; in wriop_get_phy_address()
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/
H A Dmake_fit_atf.py62 def append_atf_node(file, atf_index, phy_addr): argument
66 data = 'bl31_0x%08x.bin' % phy_addr
74 print >> file, '\t\t\tload = <0x%08x>;' % phy_addr
76 print >> file, '\t\t\tentry = <0x%08x>;' % phy_addr
/rk3399_rockchip-uboot/board/freescale/ls2080aqds/
H A Deth.c222 int phy_addr = 0; in qsgmii_configure_repeater() local
243 phy_addr = 0; in qsgmii_configure_repeater()
251 phy_addr = 4; in qsgmii_configure_repeater()
259 phy_addr = 8; in qsgmii_configure_repeater()
267 phy_addr = 0xc; in qsgmii_configure_repeater()
273 ret = miiphy_write(dev, phy_addr, 0x1f, 3); in qsgmii_configure_repeater()
275 ret = miiphy_read(dev, phy_addr, 0x11, &value); in qsgmii_configure_repeater()
277 ret = miiphy_read(dev, phy_addr, 0x11, &value); in qsgmii_configure_repeater()
306 ret = miiphy_read(dev, phy_addr, 0x11, &value); in qsgmii_configure_repeater()
310 ret = miiphy_read(dev, phy_addr, 0x11, &value); in qsgmii_configure_repeater()
/rk3399_rockchip-uboot/arch/arm/cpu/armv7/ls102xa/
H A Dcpu.c99 static inline void set_pgtable(u32 *page_table, u32 index, u32 phy_addr) in set_pgtable() argument
101 u32 value = phy_addr | PMD_TYPE_TABLE; in set_pgtable()
108 static inline void set_pgsection(u32 *page_table, u32 index, u64 phy_addr, in set_pgsection() argument
113 value = phy_addr | PMD_TYPE_SECT | PMD_SECT_AF; in set_pgsection()

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