| /rk3399_rockchip-uboot/include/dm/ |
| H A D | of_addr.h | 28 u64 of_translate_address(const struct device_node *no, const __be32 *in_addr);
43 const __be32 *of_get_address(const struct device_node *no, int index,
61 int of_address_to_resource(const struct device_node *no, int index,
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| /rk3399_rockchip-uboot/scripts/kconfig/ |
| H A D | symbol.c | 24 .curr = { "n", no },
28 .curr = { "", no },
70 else if (modules_val == no) in sym_get_type()
121 if (prop->visible.tri != no) in sym_get_default_prop()
133 if (prop->visible.tri != no) in sym_get_range_prop()
216 tri = no; in sym_calc_visibility()
230 prop->visible.tri = no; in sym_calc_visibility()
234 if (tri == mod && (sym->type != S_TRISTATE || modules_val == no)) in sym_calc_visibility()
252 tri = no; in sym_calc_visibility()
261 tri = no; in sym_calc_visibility()
[all …]
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| H A D | confdata.c | 145 sym->def[def].tri = no; in conf_set_sym_val()
270 if (expr_calc_value(prop->visible.expr) == no || in conf_read_simple()
306 sym->def[def].tri = no; in conf_read_simple()
339 sym->def[def].tri = no; in conf_read_simple()
383 case no: in conf_read_simple()
392 if (cs->def[def].tri != no) in conf_read_simple()
452 if (sym->visible == no && !conf_unsaved) in conf_read()
891 if (sym_get_tristate_value(sym) == no) in conf_split_config()
1088 sym->def[S_DEF_USER].tri = no; in randomize_choice_values()
1114 sym->def[S_DEF_USER].tri = no; in set_all_choice_values()
[all …]
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| H A D | conf.c | 179 case no: in conf_sym()
189 if (oldval != no && sym_tristate_within_range(sym, no)) in conf_sym()
205 newval = no; in conf_sym()
248 case no: in conf_choice()
257 case no: in conf_choice()
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| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | clk_rk3066.c | 58 u32 no; member
96 .nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no};\
114 uint output_hz = vco_hz / div->no; in rkclk_set_pll()
117 (uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz); in rkclk_set_pll()
120 (div->no == 1 || !(div->no % 2))); in rkclk_set_pll()
127 ((div->nr - 1) << CLKR_SHIFT) | (div->no - 1)); in rkclk_set_pll()
145 {.nf = 25, .nr = 2, .no = 1}, in rkclk_configure_ddr()
146 {.nf = 400, .nr = 9, .no = 2}, in rkclk_configure_ddr()
147 {.nf = 500, .nr = 9, .no = 2}, in rkclk_configure_ddr()
148 {.nf = 100, .nr = 3, .no = 1}, in rkclk_configure_ddr()
[all …]
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| H A D | clk_rk3188.c | 59 u32 no; member
94 .nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no};\
112 uint output_hz = vco_hz / div->no; in rkclk_set_pll()
115 (uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz); in rkclk_set_pll()
118 (div->no == 1 || !(div->no % 2))); in rkclk_set_pll()
125 ((div->nr - 1) << CLKR_SHIFT) | (div->no - 1)); in rkclk_set_pll()
143 {.nf = 25, .nr = 2, .no = 1}, in rkclk_configure_ddr()
144 {.nf = 400, .nr = 9, .no = 2}, in rkclk_configure_ddr()
145 {.nf = 500, .nr = 9, .no = 2}, in rkclk_configure_ddr()
146 {.nf = 100, .nr = 3, .no = 1}, in rkclk_configure_ddr()
[all …]
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| H A D | clk_rk3288.c | 38 u32 no; member
47 .no = _no, \
213 .nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no};\
242 uint output_hz = vco_hz / div->no; in rkclk_set_pll()
245 (uint)pll, div->nf, div->nr, div->no, vco_hz, output_hz); in rkclk_set_pll()
251 ((div->nr - 1) << CLKR_SHIFT) | (div->no - 1)); in rkclk_set_pll()
272 u32 nr, no, nf; in rkclk_pll_get_rate() local
290 no = ((con & CLKOD_MASK) >> CLKOD_SHIFT) + 1; in rkclk_pll_get_rate()
295 return (24 * nf / (nr * no)) * 1000000; in rkclk_pll_get_rate()
306 {.nf = 25, .nr = 2, .no = 1}, in rkclk_configure_ddr()
[all …]
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| H A D | clk_rk3368.c | 35 u32 no; member
44 .no = _no, \
107 .nr = _nr, .nf = (u32)((u64)hz * _nr * _no / OSC_HZ), .no = _no}; \
149 uint no = 1; in pll_para_config() local
157 no = DIV_ROUND_UP(VCO_MIN_KHZ, freq_khz); in pll_para_config()
160 no = DIV_ROUND_UP(no, *ext_div); in pll_para_config()
167 div->no = best_div->no; in pll_para_config()
173 if (no > 1) in pll_para_config()
174 no = DIV_ROUND_UP(no, 2) * 2; in pll_para_config()
176 vco_khz = freq_khz * no; in pll_para_config()
[all …]
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| /rk3399_rockchip-uboot/drivers/gpio/ |
| H A D | msm_gpio.c | 18 #define GPIO_CONFIG_OFF(no) ((no) * 0x1000) argument
19 #define GPIO_IN_OUT_OFF(no) ((no) * 0x1000 + 0x4) argument
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| /rk3399_rockchip-uboot/board/boundary/nitrogen6x/ |
| H A D | 6x_bootscript_android.txt | 18 echo "------ no Freescale display";
30 echo "------ no 1024x600 display";
42 echo "------ no 800x480 display";
54 echo "------ no HDMI monitor";
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| H A D | 6x_bootscript.txt | 9 echo "------ no HDMI monitor";
22 echo "------ no Freescale display";
34 echo "------ no 1024x600 display";
46 echo "------ no 800x480 display";
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| H A D | 6x_bootscript_android_recovery.txt | 18 echo "------ no Freescale display";
30 echo "------ no 1024x600 display";
42 echo "------ no 800x480 display";
54 echo "------ no HDMI monitor";
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| /rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3368/ |
| H A D | rk3368.c | 232 static inline uintptr_t sgrf_soc_con_addr(unsigned no) in sgrf_soc_con_addr() argument
237 return SGRF_BASE + sizeof(u32) * no; in sgrf_soc_con_addr()
240 static inline uintptr_t sgrf_busdmac_addr(unsigned no) in sgrf_busdmac_addr() argument
247 return SGRF_BUSDMAC_BASE + sizeof(u32) * no; in sgrf_busdmac_addr()
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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.plan9 | 8 copied to CONFADDR. If no arguments are specified, the contents of the
11 If no command line arguments or bootargs are defined, CONFADDR is left
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| H A D | README.autoboot | 37 character at the wrong time and the system hangs, with no clue as to
67 CONFIG_BOOT_RETRY_MIN seconds. If no valid U-Boot command is
89 Define CONFIG_AUTOBOOT_KEYED (no value required) to enable
93 otherwise there is no way to stop autoboot.
97 there is no output indicating that autoboot is in progress.
124 is checked to see if starts a new match. There is no check
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| H A D | README.rmobile | 20 (For U-Boot code this has no performance impact.)
21 Because there was no compiler which is supporting armv7a not much before.
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| /rk3399_rockchip-uboot/arch/xtensa/ |
| H A D | config.mk | 9 PLATFORM_CPPFLAGS += -D__XTENSA__ -mlongcalls -mforce-no-pic \
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| /rk3399_rockchip-uboot/ |
| H A D | .checkpatch.conf | 2 --no-tree
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| /rk3399_rockchip-uboot/doc/driver-model/ |
| H A D | serial-howto.txt | 10 The deadline for this work was the end of January 2016. If no one steps
19 - Your board should then build, but will not boot since there will be no serial
33 - (if no boards remain that don't use driver model) remove the old code
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| H A D | i2c-howto.txt | 22 The deadline for this work is the end of June 2017. If no one steps
32 no I2C driver
45 - (if no boards remain that don't use driver model) remove the old code
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/firmware/ |
| H A D | nvidia,tegra186-bpmp.txt | 50 itself, although no such configuration nodes are currently defined by this
53 The BPMP firmware defines no single global name-/numbering-space for such
56 hypothetical SPI bus service). As such, child device nodes will have no reg
57 property, and the BPMP node will have no #address-cells or #size-cells property.
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| /rk3399_rockchip-uboot/board/freescale/ls1021aiot/ |
| H A D | ls102xa_rcw_sd.cfg | 5 #Default with 2 x SGMII (no SATA)
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| /rk3399_rockchip-uboot/drivers/phy/ |
| H A D | Kconfig | 48 Support for a no-op PHY driver (stubbed PHY driver).
50 This is useful when a driver uses the PHY framework but no real PHY
57 Support for a no-op PHY driver (stubbed PHY driver) in the SPL.
59 This is useful when a driver uses the PHY framework but no real PHY
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | sun9i-a80-cx-a99.dts | 49 * Instabox Fantasy A8 (no external antenna)
103 gpio = <&r_pio 0 7 /* no flag support */ 0>; /* PL7 */
113 gpio = <&r_pio 0 8 /* no flag support */ 0>; /* PL8 */
133 gpios = <&r_pio 0 3 /* no flag support */ 0>, /* PL3 */
134 <&r_pio 0 4 /* no flag support */ 0>, /* PL4 */
135 <&r_pio 0 5 /* no flag support */ 0>; /* PL5 */
301 * There is currently no way to express that.
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| /rk3399_rockchip-uboot/scripts/ |
| H A D | mkmakefile | 43 MAKEFLAGS += --no-print-directory
|