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/rk3399_rockchip-uboot/arch/x86/cpu/ivybridge/
H A Dmodel_206ax.c44 if (msr.lo & (1 << 0)) { in enable_vmx()
56 msr.lo = 0; in enable_vmx()
77 msr.lo |= (1 << 2); in enable_vmx()
79 msr.lo |= (1 << 1); in enable_vmx()
173 if (!(msr.lo & PLATFORM_INFO_SET_TDP)) in set_power_limits()
178 power_unit = 2 << ((msr.lo & 0xf) - 1); in set_power_limits()
182 tdp = msr.lo & 0x7fff; in set_power_limits()
183 min_power = (msr.lo >> 16) & 0x7fff; in set_power_limits()
201 limit.lo = 0; in set_power_limits()
202 limit.lo |= tdp & PKG_POWER_LIMIT_MASK; in set_power_limits()
[all …]
/rk3399_rockchip-uboot/arch/x86/cpu/broadwell/
H A Dcpu.c113 perf_ctl.lo = (msr.lo & 0xff) << 8; in set_max_freq()
117 perf_ctl.lo = msr.lo & 0xff00; in set_max_freq()
124 ((perf_ctl.lo >> 8) & 0xff) * CPU_BCLK); in set_max_freq()
279 msr.lo &= ~0xff000000; in initialize_vr_config()
282 msr.lo |= (min_vid & 0xff) << 24; in initialize_vr_config()
287 msr.lo &= ~0xffff; in initialize_vr_config()
293 msr.lo |= 0x006a; /* 1.56V */ in initialize_vr_config()
295 msr.lo |= 0x006f; /* 1.60V */ in initialize_vr_config()
417 perf_ctl.lo = (msr.lo & 0xff) << 8; in set_max_ratio()
421 perf_ctl.lo = (msr.lo & 0xff) << 8; in set_max_ratio()
[all …]
/rk3399_rockchip-uboot/arch/nios2/cpu/
H A Dstart.S34 ori r4, r0, %lo(ICACHE_LINE_SIZE)
36 ori r5, r5, %lo(ICACHE_SIZE_MAX)
49 ori et, et, %lo(_exception)
63 ori r4, r0, %lo(DCACHE_LINE_SIZE_MIN)
65 ori r5, r5, %lo(DCACHE_SIZE_MAX)
79 ori r5, r5, %lo(_cur - _start)
83 ori r5, r5, %lo(_start) /* r5 <- linked _start */
88 ori r6, r6, %lo(CONFIG_SYS_MONITOR_LEN)
99 ori r4, r4, %lo(_reloc)
112 ori r2, r2, %lo(debug_uart_init@h)
[all …]
H A Dexceptions.S71 ori r3, r3, %lo(external_interrupt)
87 ori r3, r3, %lo(OPC_TRAP)
92 ori r3, r3, %lo(trap_handler)
100 ori r3, r3, %lo(soft_emulation)
/rk3399_rockchip-uboot/arch/x86/cpu/intel_common/
H A Dcpu.c75 if (!(flex_ratio.lo & FLEX_RATIO_EN)) in cpu_set_flex_ratio_to_tdp_nominal()
85 nominal_ratio = msr.lo & 0xff; in cpu_set_flex_ratio_to_tdp_nominal()
88 if (((flex_ratio.lo >> 8) & 0xff) == nominal_ratio) in cpu_set_flex_ratio_to_tdp_nominal()
92 flex_ratio.lo &= ~0xff00; in cpu_set_flex_ratio_to_tdp_nominal()
93 flex_ratio.lo |= nominal_ratio << 8; in cpu_set_flex_ratio_to_tdp_nominal()
94 flex_ratio.lo |= FLEX_RATIO_LOCK; in cpu_set_flex_ratio_to_tdp_nominal()
/rk3399_rockchip-uboot/cmd/
H A Dmii.c32 ushort lo; member
161 mask_in_place = pdesc->mask << pdesc->lo; in dump_reg()
171 if (pdesc->hi == pdesc->lo) in dump_reg()
172 printf("%2u ", pdesc->lo); in dump_reg()
174 printf("%2u-%2u", pdesc->hi, pdesc->lo); in dump_reg()
176 (regval & mask_in_place) >> pdesc->lo, in dump_reg()
199 if ((regno == MII_BMCR) && (pdesc->lo == 6)) { in special_field()
211 else if ((regno == MII_BMCR) && (pdesc->lo == 8)) { in special_field()
213 pdesc->lo, in special_field()
214 (regval >> pdesc->lo) & 1, in special_field()
[all …]
/rk3399_rockchip-uboot/arch/x86/cpu/baytrail/
H A Dcpu.c73 msr.lo |= (1 << 16); in set_max_freq()
81 perf_ctl.lo = (msr.lo & 0x3f0000) >> 8; in set_max_freq()
88 perf_ctl.lo |= (msr.lo & 0x7f0000) >> 16; in set_max_freq()
125 switch (clk_info.lo & 0x3) { in bus_freq()
149 return bclk * ((platform_info.lo >> 8) & 0xff); in tsc_freq()
/rk3399_rockchip-uboot/scripts/
H A Dcleanpatch20 my($lo) = '';
30 $lo .= "\t" x $ntab;
34 $lo .= " " x $nsp;
37 $lo .= $c;
42 $lo .= " " x $nsp;
45 $lo .= $c;
49 $lo .= " " x $nsp;
50 return $lo;
/rk3399_rockchip-uboot/lib/bzip2/
H A Dbzlib_blocksort.c74 Int32 lo, in fallbackSimpleSort() argument
80 if (lo == hi) return; in fallbackSimpleSort()
82 if (hi - lo > 3) { in fallbackSimpleSort()
83 for ( i = hi-4; i >= lo; i-- ) { in fallbackSimpleSort()
92 for ( i = hi-1; i >= lo; i-- ) { in fallbackSimpleSort()
139 Int32 sp, lo, hi; in fallbackQSort3() local
153 fpop ( lo, hi ); in fallbackQSort3()
154 if (hi - lo < FALLBACK_QSORT_SMALL_THRESH) { in fallbackQSort3()
155 fallbackSimpleSort ( fmap, eclass, lo, hi ); in fallbackQSort3()
168 if (r3 == 0) med = eclass[fmap[lo]]; else in fallbackQSort3()
[all …]
/rk3399_rockchip-uboot/drivers/timer/
H A Dtsc_timer.c85 u32 lo, hi, ratio, freq_id, freq; in cpu_mhz_from_msr() local
97 rdmsr(MSR_PLATFORM_INFO, lo, hi); in cpu_mhz_from_msr()
98 ratio = (lo >> 8) & 0xff; in cpu_mhz_from_msr()
100 rdmsr(MSR_IA32_PERF_STATUS, lo, hi); in cpu_mhz_from_msr()
111 rdmsr(MSR_FSB_FREQ, lo, hi); in cpu_mhz_from_msr()
112 freq_id = lo & 0x7; in cpu_mhz_from_msr()
/rk3399_rockchip-uboot/tools/
H A Dgen_ethaddr_crc.c20 uint8_t nibble_to_hex(const char *nibble, bool lo) in nibble_to_hex() argument
22 return (strtol(nibble, NULL, 16) << (lo ? 0 : 4)) & (lo ? 0x0f : 0xf0); in nibble_to_hex()
/rk3399_rockchip-uboot/arch/xtensa/lib/
H A Dtime.c52 ulong lo, hi, i; in __udelay() local
57 lo = usec & ((1<<22)-1); in __udelay()
61 delay_cycles(mhz * lo); in __udelay()
/rk3399_rockchip-uboot/include/
H A Dhexdump.h59 int lo = hex_to_bin(*src++); in hex2bin() local
61 if ((hi < 0) || (lo < 0)) in hex2bin()
64 *dst++ = (hi << 4) | lo; in hex2bin()
/rk3399_rockchip-uboot/arch/x86/cpu/
H A Dlapic.c73 msr.lo |= MSR_IA32_APICBASE_ENABLE; in enable_lapic()
74 msr.lo &= ~MSR_IA32_APICBASE_BASE; in enable_lapic()
75 msr.lo |= LAPIC_DEFAULT_BASE; in enable_lapic()
86 msr.lo &= ~MSR_IA32_APICBASE_ENABLE; in disable_lapic()
H A Dmp_init.c39 uint32_t lo; member
175 entry->lo = msr.lo; in save_msr()
193 num_var_mtrrs = msr.lo & 0xff; in save_bsp_msrs()
/rk3399_rockchip-uboot/include/linux/
H A Dkernel.h191 #define clamp(val, lo, hi) min((typeof(val))max(val, lo), hi) argument
219 #define clamp_t(type, val, lo, hi) min_t(type, max_t(type, val, lo), hi) argument
232 #define clamp_val(val, lo, hi) clamp_t(typeof(val), val, lo, hi) argument
/rk3399_rockchip-uboot/arch/x86/lib/
H A Dcoreboot_table.c124 map->start.lo = e820[i].addr & 0xffffffff; in write_coreboot_table()
126 map->size.lo = e820[i].size & 0xffffffff; in write_coreboot_table()
134 map->start.lo = cfg_tables->start & 0xffffffff; in write_coreboot_table()
136 map->size.lo = cfg_tables->size & 0xffffffff; in write_coreboot_table()
/rk3399_rockchip-uboot/arch/arc/lib/
H A Dstrcmp.S45 bset.lo %r0, %r0, 31
61 bset.lo %r0, %r0, 31
85 bset.lo %r0, %r0, 31
/rk3399_rockchip-uboot/arch/arm/lib/
H A Drelocate_64.S55 b.lo copy_loop
78 b.lo fixloop
/rk3399_rockchip-uboot/drivers/video/
H A Dconsole_truetype.c49 double lo = 1.0; in tt_sqrt() local
52 while (hi - lo > 0.00001) { in tt_sqrt()
53 double mid = lo + (hi - lo) / 2; in tt_sqrt()
58 lo = mid; in tt_sqrt()
61 return lo; in tt_sqrt()
/rk3399_rockchip-uboot/arch/x86/include/asm/
H A Dmsr.h207 uint32_t lo; member
215 rdmsr(msr_num, msr.lo, msr.hi); in msr_read()
222 wrmsr(msr_num, msr.lo, msr.hi); in msr_write()
/rk3399_rockchip-uboot/configs/
H A DMSI_Primo73_defconfig5 CONFIG_VIDEO_LCD_MODE="x:1024,y:600,depth:18,pclk_khz:60000,le:60,ri:160,up:13,lo:12,hs:100,vs:10,s…
H A Dsunxi_Gemei_G9_defconfig6 CONFIG_VIDEO_LCD_MODE="x:1024,y:768,depth:18,pclk_khz:100000,le:799,ri:260,up:15,lo:16,hs:1,vs:1,sy…
H A Dinet97fv2_defconfig9 CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:…
H A Dinet9f_rev03_defconfig9 CONFIG_VIDEO_LCD_MODE="x:800,y:480,depth:24,pclk_khz:33000,le:45,ri:209,up:22,lo:22,hs:1,vs:1,sync:…

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