History log of /rk3399_rockchip-uboot/arch/x86/cpu/ivybridge/model_206ax.c (Results 1 – 23 of 23)
Revision Date Author Comments
# 21342d4a 08-Feb-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-dm


# e160f7d4 17-Jan-2017 Simon Glass <sjg@chromium.org>

dm: core: Replace of_offset with accessor

At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree,

dm: core: Replace of_offset with accessor

At present devices use a simple integer offset to record the device tree
node associated with the device. In preparation for supporting a live
device tree, which uses a node pointer instead, refactor existing code to
access this field through an inline function.

Signed-off-by: Simon Glass <sjg@chromium.org>

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# 05af050e 16-Jan-2017 Simon Glass <sjg@chromium.org>

x86: ivybridge: Declare global data where it is used

Some files are missing this declaration. Add it to avoid build errors when
we actually need the declaration.

Signed-off-by: Simon Glass <sjg@chr

x86: ivybridge: Declare global data where it is used

Some files are missing this declaration. Add it to avoid build errors when
we actually need the declaration.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 3431b392 19-Oct-2016 Tom Rini <trini@konsulko.com>

Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2016-10-19

Highlights this time around:

- Add run time service (power control) support for PSCI (fixed in v3)

Merge tag 'signed-efi-next' of git://github.com/agraf/u-boot

Patch queue for efi - 2016-10-19

Highlights this time around:

- Add run time service (power control) support for PSCI (fixed in v3)
- Add efi gop pointer exposure
- SMBIOS support for EFI (on ARM)
- efi pool memory unmap support (needed for 4.8)
- initial x86 efi payload support (fixed up in v2)
- various bug fixes

Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
include/tables_csum.h

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# 94eaa79c 18-Aug-2016 Alexander Graf <agraf@suse.de>

cpu: Add get_vendor callback

The CPU udevice already has a few callbacks to retreive information
about the currently running CPUs. This patch adds a new get_vendor()
call that returns the vendor of

cpu: Add get_vendor callback

The CPU udevice already has a few callbacks to retreive information
about the currently running CPUs. This patch adds a new get_vendor()
call that returns the vendor of the main CPUs.

Signed-off-by: Alexander Graf <agraf@suse.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 5ebd27d8 12-Oct-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-x86


# b6409ec3 06-Oct-2016 Simon Glass <sjg@chromium.org>

dm: x86: Move link to use driver model for video

Update the configuration to use the new driver. Drop the existing plumbing
code and unused header files.

Signed-off-by: Simon Glass <sjg@chromium.or

dm: x86: Move link to use driver model for video

Update the configuration to use the new driver. Drop the existing plumbing
code and unused header files.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# dc557e9a 18-Jun-2016 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>


# 6d54868e 23-May-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-x86


# e2126711 22-May-2016 Bin Meng <bmeng.cn@gmail.com>

x86: Call lapic_setup() in interrupt_init()

Let's configure LAPIC in a common place - interrupt_init().

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>


# b6524477 07-May-2016 Bin Meng <bmeng.cn@gmail.com>

x86: Drop asm/acpi.h

Remove asm/acpi.h which is never used.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Sim

x86: Drop asm/acpi.h

Remove asm/acpi.h which is never used.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Tested-by: Stefan Roese <sr@denx.de>
Reviewed-by: Simon Glass <sjg@chromium.org>

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# 64992778 12-Mar-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Show microcode version for each core

Enable the microcode feature so that the microcode version is shown with the
'cpu detail' command.

Signed-off-by: Simon Glass <sjg@chromium.org>

x86: ivybridge: Show microcode version for each core

Enable the microcode feature so that the microcode version is shown with the
'cpu detail' command.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 8bf08b42 07-Mar-2016 Simon Glass <sjg@chromium.org>

x86: Add some more common MSR indexes

Many of the model-specific indexes are common to several Intel CPUs. Add
some more common ones, and remove them from the ivybridge-specific header
file.

Signed

x86: Add some more common MSR indexes

Many of the model-specific indexes are common to several Intel CPUs. Add
some more common ones, and remove them from the ivybridge-specific header
file.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# d173185d 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Drop the dead MTRR code

This is not used and MTRRs are set up elsewhere now. Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>


# 709b1902 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Set up the thermal target correctly

This uses a non-existent node at present. It should use the first CPU node.
The referenced property does not exist (the correct value is the defau

x86: ivybridge: Set up the thermal target correctly

This uses a non-existent node at present. It should use the first CPU node.
The referenced property does not exist (the correct value is the default of
0), but this allows the follow-on init to complete.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# 9d156b57 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Move CPU init code into the driver

Use the CPU driver's probe() method to perform the CPU init. This will happen
automatically when the first CPU is probed.

Signed-off-by: Simon Gla

x86: ivybridge: Move CPU init code into the driver

Use the CPU driver's probe() method to perform the CPU init. This will happen
automatically when the first CPU is probed.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# bba22a97 17-Jan-2016 Simon Glass <sjg@chromium.org>

x86: ivybridge: Use common CPU init code

The existing ivybridge code predates the normal multi-core CPU init, and
it is not used. Remove it and add CPU nodes to the device tree so that all
four CPUs

x86: ivybridge: Use common CPU init code

The existing ivybridge code predates the normal multi-core CPU init, and
it is not used. Remove it and add CPU nodes to the device tree so that all
four CPUs are set up. Also enable the 'cpu' command.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# f448c5d3 17-Jul-2015 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot


# 605e15db 15-Jul-2015 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-x86


# 63d54a67 17-Jun-2015 Bin Meng <bmeng.cn@gmail.com>

x86: Clean up lapic codes

This commit cleans up the lapic codes:
- Delete arch/x86/include/asm/lapic_def.h, and move register and bit
defines into arch/x86/include/asm/lapic.h
- Use MSR defines fr

x86: Clean up lapic codes

This commit cleans up the lapic codes:
- Delete arch/x86/include/asm/lapic_def.h, and move register and bit
defines into arch/x86/include/asm/lapic.h
- Use MSR defines from msr-index.h in enable_lapic() and disable_lapic()
- Remove unnecessary stuff like NEED_LAPIC, X86_GOOD_APIC and
CONFIG_AP_IN_SIPI_WAIT
- Move struct x86_cpu_priv defines to asm/arch-ivybridge/bd82x6x.h, as
it is not apic related and only used by ivybridge
- Fix coding convention issues

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>

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# 45b5a378 30-Apr-2015 Simon Glass <sjg@chromium.org>

x86: Add multi-processor init

Most modern x86 CPUs include more than one CPU core. The OS normally requires
that these 'Application Processors' (APs) be brought up by the boot loader.
Add the requir

x86: Add multi-processor init

Most modern x86 CPUs include more than one CPU core. The OS normally requires
that these 'Application Processors' (APs) be brought up by the boot loader.
Add the required support to U-Boot to init additional APs.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>

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# f4e7e2d1 01-Dec-2014 Tom Rini <trini@ti.com>

Merge git://git.denx.de/u-boot-x86


# bb80be39 25-Nov-2014 Simon Glass <sjg@chromium.org>

x86: Add init for model 206AX CPU

Add the setup code for the CPU so that it can be used at full speed.

Signed-off-by: Simon Glass <sjg@chromium.org>