| /rk3399_rockchip-uboot/drivers/video/sunxi/ |
| H A D | lcdc.c | 30 void lcdc_init(struct sunxi_lcdc_reg * const lcdc) in lcdc_init() argument
33 writel(0, &lcdc->ctrl); /* Disable tcon */ in lcdc_init()
34 writel(0, &lcdc->int0); /* Disable all interrupts */ in lcdc_init()
37 clrbits_le32(&lcdc->tcon0_dclk, SUNXI_LCDC_TCON0_DCLK_ENABLE); in lcdc_init()
40 writel(0xffffffff, &lcdc->tcon0_io_tristate); in lcdc_init()
41 writel(0xffffffff, &lcdc->tcon1_io_tristate); in lcdc_init()
44 void lcdc_enable(struct sunxi_lcdc_reg * const lcdc, int depth) in lcdc_enable() argument
46 setbits_le32(&lcdc->ctrl, SUNXI_LCDC_CTRL_TCON_ENABLE); in lcdc_enable()
48 setbits_le32(&lcdc->tcon0_lvds_intf, SUNXI_LCDC_TCON0_LVDS_INTF_ENABLE); in lcdc_enable()
49 setbits_le32(&lcdc->lvds_ana0, SUNXI_LCDC_LVDS_ANA0); in lcdc_enable()
[all …]
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| H A D | Makefile | 8 obj-$(CONFIG_VIDEO_SUNXI) += sunxi_display.o lcdc.o tve_common.o ../videomodes.o
9 obj-$(CONFIG_VIDEO_DE2) += sunxi_de2.o sunxi_dw_hdmi.o lcdc.o ../dw_hdmi.o
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| H A D | sunxi_dw_hdmi.c | 249 struct sunxi_lcdc_reg *lcdc; in sunxi_dw_hdmi_lcdc_init() local
252 lcdc = (struct sunxi_lcdc_reg *)SUNXI_LCD0_BASE; in sunxi_dw_hdmi_lcdc_init()
262 lcdc = (struct sunxi_lcdc_reg *)SUNXI_LCD1_BASE; in sunxi_dw_hdmi_lcdc_init()
273 lcdc_init(lcdc); in sunxi_dw_hdmi_lcdc_init()
274 lcdc_tcon1_mode_set(lcdc, edid, false, false); in sunxi_dw_hdmi_lcdc_init()
275 lcdc_enable(lcdc, bpp); in sunxi_dw_hdmi_lcdc_init()
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| H A D | sunxi_display.c | 635 struct sunxi_lcdc_reg * const lcdc = in sunxi_lcdc_init() local
655 lcdc_init(lcdc); in sunxi_lcdc_init()
755 struct sunxi_lcdc_reg * const lcdc = local
779 lcdc_tcon0_mode_set(lcdc, &timing, clk_div, for_ext_vga_dac,
788 struct sunxi_lcdc_reg * const lcdc = local
793 lcdc_tcon1_mode_set(lcdc, &timing, use_portd_hvsync,
1030 struct sunxi_lcdc_reg * const lcdc = local
1045 lcdc_enable(lcdc, sunxi_display.depth);
1075 lcdc_enable(lcdc, sunxi_display.depth);
1087 lcdc_enable(lcdc, sunxi_display.depth);
[all …]
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| /rk3399_rockchip-uboot/arch/arm/include/asm/arch-sunxi/ |
| H A D | lcdc.h | 118 void lcdc_init(struct sunxi_lcdc_reg * const lcdc);
119 void lcdc_enable(struct sunxi_lcdc_reg * const lcdc, int depth);
120 void lcdc_tcon0_mode_set(struct sunxi_lcdc_reg * const lcdc,
124 void lcdc_tcon1_mode_set(struct sunxi_lcdc_reg * const lcdc,
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | rk3326.dtsi | 17 lcdc {
18 lcdc_m1_rgb_pins: lcdc-m1-rgb-pins {
40 lcdc_m1_sleep_pins: lcdc-m1-sleep-pins {
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| H A D | am335x-boneblack.dts | 73 &lcdc {
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| H A D | rk1808.dtsi | 1513 lcdc {
1514 lcdc_rgb_dclk_pin: lcdc-rgb-dclk-pin {
1520 lcdc_rgb_den_pin: lcdc-rgb-den-pin {
1526 lcdc_rgb_m0_hsync_pin: lcdc-rgb-m0-hsync-pin {
1532 lcdc_rgb_m0_vsync_pin: lcdc-rgb-m0-vsync-pin {
1538 lcdc_rgb_m1_hsync_pin: lcdc-rgb-m1-hsync-pin {
1544 lcdc_rgb_m1_vsync_pin: lcdc-rgb-m1-vsync-pin {
1550 lcdc_rgb666_data_pins: lcdc-rgb666-data-pins {
1590 lcdc_rgb565_data_pins: lcdc-rgb565-data-pins {
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| H A D | rk3128.dtsi | 131 lcdc {
814 lcdc {
815 lcdc_rgb_pins: lcdc-rgb-pins {
837 lcdc_sleep_pins: lcdc-sleep-pins {
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| H A D | am33xx.dtsi | 783 lcdc: lcdc@4830e000 { label
787 ti,hwmods = "lcdc";
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| H A D | rk3288-miqi.dtsi | 44 lcdc-supply = <&vcc_io>;
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| H A D | am335x-pxm2.dtsi | 237 &lcdc {
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| H A D | rk3308.dtsi | 1191 lcdc {
1192 lcdc_ctl: lcdc-ctl {
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| H A D | rv1126-pinctrl.dtsi | 572 lcdc {
573 lcdc_ctl: lcdc-ctl {
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| H A D | rk3288-popmetal.dtsi | 84 lcdc-supply = <&vcc_io>;
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| H A D | rk3288-phycore-som.dtsi | 86 lcdc-supply = <&vdd_3v3_io>;
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| H A D | am335x-rut.dts | 280 &lcdc {
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| H A D | px30.dtsi | 2027 lcdc {
2028 lcdc_m0_rgb_pins: lcdc-m0-rgb-pins {
2060 lcdc_m0_sleep_pins: lcdc-m0-sleep-pins {
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| H A D | at91sam9261.dtsi | 86 compatible = "atmel,at91sam9261-lcdc";
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| H A D | rv1108.dtsi | 529 lcdc_mipi_data: lcdc-mipi_data {
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| H A D | rk3568-pinctrl.dtsi | 1005 lcdc {
1006 lcdc_ctl: lcdc-ctl {
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| H A D | am335x-evmsk.dts | 718 &lcdc {
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| H A D | am335x-evm.dts | 480 &lcdc {
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| H A D | rk3288-veyron.dtsi | 217 lcdc-supply = <&vcc33_lcd>;
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| H A D | at91sam9rl.dtsi | 87 compatible = "atmel,at91sam9rl-lcdc";
|