| #
c5c7b477 |
| 20-Jul-2018 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: dts: update mmc property "ciu-sample"
dts property always use '-' instead of '_' for description
Change-Id: I216549bec2850c614b2173ac4a3bae58da317379
Signed-off-by: Kever Yang <kever.yang
rockchip: dts: update mmc property "ciu-sample"
dts property always use '-' instead of '_' for description
Change-Id: I216549bec2850c614b2173ac4a3bae58da317379
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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|
| #
c22f479c |
| 05-Jul-2018 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: dts: rk3288: add rk3288-u-boot.dtsi
Change-Id: I5c48541e1eeffc8d83e05c3ee8a87454f8ff62af
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
|
| #
26ceaeee |
| 22-Jan-2018 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: dts: rk3288: update spl-boot-order
Use "uboot,spl-boot-orde" instead of "uboot,boot0".
Change-Id: I647500193ab7cd89e7e409b75793a3eff4453d84
Signed-off-by: Kever Yang <kever.yang@rock-chip
rockchip: dts: rk3288: update spl-boot-order
Use "uboot,spl-boot-orde" instead of "uboot,boot0".
Change-Id: I647500193ab7cd89e7e409b75793a3eff4453d84
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
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|
| #
2d221489 |
| 29-Nov-2016 |
Stefano Babic <sbabic@denx.de> |
Merge branch 'master' of git://git.denx.de/u-boot
Signed-off-by: Stefano Babic <sbabic@denx.de>
|
| #
8d089854 |
| 26-Nov-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-rockchip
|
| #
aede3acc |
| 13-Nov-2016 |
Simon Glass <sjg@chromium.org> |
rockchip: Move jerry SDRAM settings into its own .dts file
The SDRAM settings are not common across all veyron models. Move the
current settings into Jerry's file.
Signed-off-by: Simon Glass <sjg@c
rockchip: Move jerry SDRAM settings into its own .dts file
The SDRAM settings are not common across all veyron models. Move the
current settings into Jerry's file.
Signed-off-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
7fd11738 |
| 02-Nov-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-rockchip
|
| #
612a2a0a |
| 07-Oct-2016 |
Kever Yang <kever.yang@rock-chips.com> |
dts: rk3288: remove node in dmc which not need anymore
Since we implement the dram capacity auto detect, we don't
need to set the channel number and sdram-channel in dts.
Signed-off-by: Kever Yang
dts: rk3288: remove node in dmc which not need anymore
Since we implement the dram capacity auto detect, we don't
need to set the channel number and sdram-channel in dts.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Tested-by: Vagrant Cascadian <vagrant@debian.org>
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|
| #
2863a9bf |
| 06-Aug-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-rockchip
|
| #
2918d967 |
| 28-Jul-2016 |
Sandy Patterson <apatterson@sightlogix.com> |
rockchip: rockchip, sdram-channel 0xff fix remaining dts
Add an extra byte so that this data is not byteswapped.
Signed-off-by: Sandy Patterson <apatterson@sightlogix.com>
Acked-by: Simon Glass <sj
rockchip: rockchip, sdram-channel 0xff fix remaining dts
Add an extra byte so that this data is not byteswapped.
Signed-off-by: Sandy Patterson <apatterson@sightlogix.com>
Acked-by: Simon Glass <sjg@chromium.org>
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|
| #
dae594f2 |
| 22-Jan-2016 |
Simon Glass <sjg@chromium.org> |
rockchip: spl: Support full-speed CPU in SPL
Add a feature which speeds up the CPU to full speed in SPL to minimise
boot time. This is only supported for certain boards (at present only
jerry).
Sig
rockchip: spl: Support full-speed CPU in SPL
Add a feature which speeds up the CPU to full speed in SPL to minimise
boot time. This is only supported for certain boards (at present only
jerry).
Signed-off-by: Simon Glass <sjg@chromium.org>
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|
| #
4f14d135 |
| 22-Jan-2016 |
Simon Glass <sjg@chromium.org> |
rockchip: jerry: Fix the SDRAM timing
There is a minor error in the SDRAM timing. It does not seem to affect
anything so far. Fix it just in case.
Signed-off-by: Simon Glass <sjg@chromium.org>
|
| #
f4adc9a5 |
| 22-Jan-2016 |
Simon Glass <sjg@chromium.org> |
rockchip: jerry: Disable pmic-int-1 setup to avoid a hang
This hangs when activated (by probing the PMIC). Disable it for now until we
understand the root cause.
Signed-off-by: Simon Glass <sjg@chr
rockchip: jerry: Disable pmic-int-1 setup to avoid a hang
This hangs when activated (by probing the PMIC). Disable it for now until we
understand the root cause.
Signed-off-by: Simon Glass <sjg@chromium.org>
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|
| #
79d020ee |
| 22-Jan-2016 |
Simon Glass <sjg@chromium.org> |
rockchip: Use pwrseq for MMC start-up on jerry
This is defined in the device tree in Linux. Copy over the settings so that
this can be used instead of hard-coding the reset line.
Signed-off-by: Sim
rockchip: Use pwrseq for MMC start-up on jerry
This is defined in the device tree in Linux. Copy over the settings so that
this can be used instead of hard-coding the reset line.
Signed-off-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
c9feb427 |
| 03-Sep-2015 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-rockchip
|
| #
e2e947ff |
| 30-Aug-2015 |
Simon Glass <sjg@chromium.org> |
rockchip: Add basic support for jerry
This builds and displays an SPL message, but does not function beyond that.
Signed-off-by: Simon Glass <sjg@chromium.org>
|