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Searched refs:grf (Results 1 – 25 of 147) sorted by relevance

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/rk3399_rockchip-uboot/drivers/phy/
H A Dphy-rockchip-naneng-edp.c70 struct regmap *grf; member
74 static inline int rockchip_grf_write(struct regmap *grf, uint reg, uint mask, in rockchip_grf_write() argument
77 return regmap_write(grf, reg, (mask << 16) | (val & mask)); in rockchip_grf_write()
103 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON3, in rockchip_edp_phy_set_voltage()
106 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON4, in rockchip_edp_phy_set_voltage()
109 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON5, in rockchip_edp_phy_set_voltage()
114 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON3, in rockchip_edp_phy_set_voltage()
117 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON4, in rockchip_edp_phy_set_voltage()
120 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON5, in rockchip_edp_phy_set_voltage()
125 rockchip_grf_write(edpphy->grf, EDP_PHY_GRF_CON3, in rockchip_edp_phy_set_voltage()
[all …]
H A Dphy-rockchip-naneng-usb2.c147 void __iomem *grf; member
219 if (!property_enabled(rphy->grf, &port_cfg->utmi_bvalid)) { in rockchip_chg_get_type()
227 property_enable(rphy->grf, &rphy->phy_cfg->chg_det.chg_en, true); in rockchip_chg_get_type()
228 property_enable(rphy->grf, &rphy->phy_cfg->chg_det.chg_rst, false); in rockchip_chg_get_type()
233 chg_valid = property_enabled(rphy->grf, in rockchip_chg_get_type()
236 property_enabled(rphy->grf, in rockchip_chg_get_type()
250 property_enable(rphy->grf, &rphy->phy_cfg->chg_det.chg_rst, true); in rockchip_chg_get_type()
251 property_enable(rphy->grf, &rphy->phy_cfg->chg_det.chg_en, false); in rockchip_chg_get_type()
271 void __iomem *base = rphy->grf; in rockchip_usb2phy_check_vbus()
304 property_enable(rphy->grf, &port_cfg->phy_sus, false); in rockchip_usb2phy_init()
[all …]
/rk3399_rockchip-uboot/drivers/net/
H A Dgmac_rockchip.c188 struct px30_grf *grf; in px30_gmac_fix_mac_speed() local
221 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in px30_gmac_fix_mac_speed()
222 rk_clrsetreg(&grf->mac_con1, PX30_GMAC_SPEED_MASK, speed); in px30_gmac_fix_mac_speed()
267 struct rk322x_grf *grf; in rk3228_gmac_fix_mac_speed() local
304 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3228_gmac_fix_mac_speed()
305 rk_clrsetreg(&grf->mac_con[1], in rk3228_gmac_fix_mac_speed()
318 struct rk3288_grf *grf; in rk3288_gmac_fix_mac_speed() local
336 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3288_gmac_fix_mac_speed()
337 rk_clrsetreg(&grf->soc_con1, RK3288_GMAC_CLK_SEL_MASK, clk); in rk3288_gmac_fix_mac_speed()
346 struct rk3308_grf *grf; in rk3308_gmac_fix_mac_speed() local
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rv1126/
H A Drv1126.c379 static struct rv1126_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init() local
382 rk_clrsetreg(&grf->gpio1c_iomux_l, in board_debug_uart_init()
389 static struct rv1126_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
407 rk_clrsetreg(&grf->gpio1d_iomux_l, in board_debug_uart_init()
414 static struct rv1126_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
418 rk_clrsetreg(&grf->iofunc_con2, UART2_IO_SEL_MASK, in board_debug_uart_init()
422 rk_clrsetreg(&grf->gpio1a_iomux_h, in board_debug_uart_init()
428 rk_clrsetreg(&grf->iofunc_con2, UART2_IO_SEL_MASK, in board_debug_uart_init()
432 rk_clrsetreg(&grf->gpio3a_iomux_l, in board_debug_uart_init()
439 static struct rv1126_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk322x/
H A Drk322x.c23 static struct rk322x_grf * const grf = (void *)GRF_BASE; in arch_cpu_init() local
32 rk_setreg(&grf->soc_con[2], 1 << 0); in arch_cpu_init()
35 rk_setreg(&grf->con_iomux, 0xf << 0); in arch_cpu_init()
38 rk_setreg(&grf->con_iomux, (1 << 11) | (1 << 8)); in arch_cpu_init()
47 rk_clrsetreg(&grf->macphy_con[0], MACPHY_CFG_ENABLE_MASK, in arch_cpu_init()
57 static struct rk322x_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init() local
78 rk_clrsetreg(&grf->gpio1b_iomux, in board_debug_uart_init()
83 rk_clrsetreg(&grf->con_iomux, in board_debug_uart_init()
/rk3399_rockchip-uboot/drivers/video/rockchip/
H A Drk3399_mipi.c33 struct rk3399_grf_regs *grf = priv->grf; in rk_mipi_dsi_source_select() local
39 rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, in rk_mipi_dsi_source_select()
43 rk_clrsetreg(&grf->soc_con20, GRF_DSI0_VOP_SEL_MASK, in rk_mipi_dsi_source_select()
58 struct rk3399_grf_regs *grf = priv->grf; in rk_mipi_dphy_mode_set() local
63 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_RXMODE_MASK, val); in rk_mipi_dphy_mode_set()
67 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TXSTOPMODE_MASK, val); in rk_mipi_dphy_mode_set()
71 rk_clrsetreg(&grf->soc_con22, GRF_DPHY_TX0_TURNREQUEST_MASK, val); in rk_mipi_dphy_mode_set()
130 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk_mipi_ofdata_to_platdata()
131 if (priv->grf <= 0) { in rk_mipi_ofdata_to_platdata()
133 __func__, priv->grf); in rk_mipi_ofdata_to_platdata()
H A Drk3288_mipi.c35 struct rk3288_grf *grf = priv->grf; in rk_mipi_dsi_source_select() local
41 rk_clrsetreg(&grf->soc_con6, RK3288_DSI0_LCDC_SEL_MASK, in rk_mipi_dsi_source_select()
46 rk_clrsetreg(&grf->soc_con6, RK3288_DSI0_LCDC_SEL_MASK, in rk_mipi_dsi_source_select()
62 struct rk3288_grf *grf = priv->grf; in rk_mipi_dphy_mode_set() local
67 rk_clrsetreg(&grf->soc_con8, RK3288_DPHY_TX0_RXMODE_MASK, val); in rk_mipi_dphy_mode_set()
72 rk_clrsetreg(&grf->soc_con8, in rk_mipi_dphy_mode_set()
78 rk_clrsetreg(&grf->soc_con8, in rk_mipi_dphy_mode_set()
138 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk_mipi_ofdata_to_platdata()
139 if (IS_ERR(priv->grf)) { in rk_mipi_ofdata_to_platdata()
141 __func__, priv->grf); in rk_mipi_ofdata_to_platdata()
H A Drk3288_hdmi.c29 struct rk3288_grf *grf = priv->grf; in rk3288_hdmi_enable() local
32 rk_setreg(&grf->soc_con6, 1 << 15); in rk3288_hdmi_enable()
35 rk_clrsetreg(&grf->soc_con6, 1 << 4, (vop_id == 1) ? (1 << 4) : 0); in rk3288_hdmi_enable()
H A Drk3399_hdmi.c29 struct rk3399_grf_regs *grf = priv->grf; in rk3399_hdmi_enable() local
32 rk_clrsetreg(&grf->soc_con20, GRF_RK3399_HDMI_VOP_SEL_MASK, in rk3399_hdmi_enable()
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3568/
H A Drk3568.c548 static struct rk3568_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
553 rk_clrsetreg(&grf->iofunc_sel3, UART1_IO_SEL_MASK, in board_debug_uart_init()
557 rk_clrsetreg(&grf->gpio2b_iomux_l, in board_debug_uart_init()
559 rk_clrsetreg(&grf->gpio2b_iomux_h, in board_debug_uart_init()
563 rk_clrsetreg(&grf->iofunc_sel3, UART1_IO_SEL_MASK, in board_debug_uart_init()
567 rk_clrsetreg(&grf->gpio3d_iomux_h, in board_debug_uart_init()
573 static struct rk3568_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init()
579 rk_clrsetreg(&grf->iofunc_sel3, UART2_IO_SEL_MASK, in board_debug_uart_init()
589 rk_clrsetreg(&grf->iofunc_sel3, UART2_IO_SEL_MASK, in board_debug_uart_init()
593 rk_clrsetreg(&grf->gpio1d_iomux_h, in board_debug_uart_init()
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3399/
H A Drk3399.c83 struct rk3399_grf_regs * const grf = (void *)GRF_BASE; in arch_cpu_init() local
104 rk_clrreg(&grf->emmccore_con[11], 0x0ff); in arch_cpu_init()
127 struct rk3399_grf_regs * const grf = (void *)GRF_BASE; in board_debug_uart_init() local
131 rk_clrsetreg(&grf->gpio2c_iomux, in board_debug_uart_init()
134 rk_clrsetreg(&grf->gpio2c_iomux, in board_debug_uart_init()
139 rk_clrsetreg(&grf->gpio4c_iomux, in board_debug_uart_init()
142 rk_clrsetreg(&grf->gpio4c_iomux, in board_debug_uart_init()
147 rk_clrsetreg(&grf->soc_con7, in board_debug_uart_init()
152 rk_clrsetreg(&grf->soc_con7, in board_debug_uart_init()
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3328/
H A Drk3328.c55 struct rk3328_grf_regs * const grf = (void *)GRF_BASE; in arch_cpu_init() local
62 rk_setreg(&grf->soc_con[4], 1 << 12); in arch_cpu_init()
76 struct rk3328_grf_regs * const grf = (void *)GRF_BASE; in board_debug_uart_init() local
103 rk_clrsetreg(&grf->com_iomux, in board_debug_uart_init()
106 rk_clrsetreg(&grf->gpio2a_iomux, in board_debug_uart_init()
109 rk_clrsetreg(&grf->gpio2a_iomux, in board_debug_uart_init()
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3368/
H A Drk3368.c95 struct rk3368_grf *grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in mcu_init() local
98 rk_clrsetreg(&grf->soc_con14, MCU_SRAM_BASE_BIT31_BIT28_MASK, in mcu_init()
100 rk_clrsetreg(&grf->soc_con11, MCU_SRAM_BASE_BIT27_BIT12_MASK, in mcu_init()
102 rk_clrsetreg(&grf->soc_con14, MCU_EXSRAM_BASE_BIT31_BIT28_MASK, in mcu_init()
104 rk_clrsetreg(&grf->soc_con12, MCU_EXSRAM_BASE_BIT27_BIT12_MASK, in mcu_init()
106 rk_clrsetreg(&grf->soc_con14, MCU_EXPERI_BASE_BIT31_BIT28_MASK, in mcu_init()
108 rk_clrsetreg(&grf->soc_con13, MCU_EXPERI_BASE_BIT27_BIT12_MASK, in mcu_init()
134 struct rk3368_grf * const grf __maybe_unused = in board_debug_uart_init()
161 rk_clrsetreg(&grf->gpio2d_iomux, in board_debug_uart_init()
163 rk_clrsetreg(&grf->gpio2d_iomux, in board_debug_uart_init()
[all …]
/rk3399_rockchip-uboot/drivers/ram/rockchip/
H A Drockchip_sdram.c33 struct rv1108_grf *grf = in dmc_probe() local
37 rockchip_sdram_size((phys_addr_t)&grf->os_reg2); in dmc_probe()
39 struct rk3036_grf *grf = in dmc_probe()
43 rockchip_sdram_size((phys_addr_t)&grf->os_reg[1]); in dmc_probe()
45 struct rk3308_grf *grf = in dmc_probe()
49 rockchip_sdram_size((phys_addr_t)&grf->os_reg2); in dmc_probe()
H A Dsdram_rk3128.c18 struct rk3128_grf *grf; member
25 priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3128_dmc_probe()
26 debug("%s: grf=%p\n", __func__, priv->grf); in rk3128_dmc_probe()
29 (phys_addr_t)&priv->grf->os_reg[1]); in rk3128_dmc_probe()
/rk3399_rockchip-uboot/drivers/video/drm/
H A Drockchip_lvds.c103 struct regmap *grf; member
249 lvds->grf = syscon_get_regmap(dev_get_parent(dev)); in rockchip_lvds_probe()
268 regmap_write(lvds->grf, PX30_GRF_PD_VO_CON1, in px30_lvds_enable()
276 regmap_write(lvds->grf, PX30_GRF_PD_VO_CON1, in px30_lvds_disable()
287 regmap_write(lvds->grf, RK3126_GRF_LVDS_CON0, in rk3126_lvds_enable()
294 regmap_write(lvds->grf, RK3126_GRF_LVDS_CON0, in rk3126_lvds_disable()
308 regmap_write(lvds->grf, RK3288_GRF_SOC_CON6, in rk3288_lvds_enable()
331 regmap_write(lvds->grf, RK3288_GRF_SOC_CON7, val); in rk3288_lvds_enable()
338 regmap_write(lvds->grf, RK3288_GRF_SOC_CON7, RK3288_LVDS_PWRDWN(1)); in rk3288_lvds_disable()
348 regmap_write(lvds->grf, RK3368_GRF_SOC_CON7, in rk3368_lvds_enable()
[all …]
H A Drockchip_dw_hdmi.c500 void inno_dw_hdmi_set_domain(void *grf, int status) in inno_dw_hdmi_set_domain() argument
503 writel(RK3328_IO_5V_DOMAIN, grf + RK3328_GRF_SOC_CON4); in inno_dw_hdmi_set_domain()
505 writel(RK3328_IO_3V_DOMAIN, grf + RK3328_GRF_SOC_CON4); in inno_dw_hdmi_set_domain()
508 void dw_hdmi_set_iomux(void *grf, void *gpio_base, struct gpio_desc *hpd_gpiod, in dw_hdmi_set_iomux() argument
519 writel(RK3328_IO_DDC_IN_MSK, grf + RK3328_GRF_SOC_CON2); in dw_hdmi_set_iomux()
520 writel(RK3328_IO_CTRL_BY_HDMI, grf + RK3328_GRF_SOC_CON3); in dw_hdmi_set_iomux()
523 writel(RK3228_IO_3V_DOMAIN, grf + RK3228_GRF_SOC_CON6); in dw_hdmi_set_iomux()
524 writel(RK3228_IO_DDC_IN_MSK, grf + RK3228_GRF_SOC_CON2); in dw_hdmi_set_iomux()
529 grf + RK3528_VO_GRF_HDMI_MASK); in dw_hdmi_set_iomux()
547 writel(val, grf + RK3528_VO_GRF_HDMI_MASK); in dw_hdmi_set_iomux()
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3308/
H A Drk3308.c143 static struct rk3308_grf * const grf = (void *)GRF_BASE; in rk_board_init() local
161 rk_clrsetreg(&grf->soc_con0, IOVSEL3_CTRL_MASK | IOVSEL3_MASK, val); in rk_board_init()
224 static struct rk3308_grf * const grf = (void *)GRF_BASE; in arch_cpu_init()
233 rk_clrsetreg(&grf->soc_con0, IOVSEL4_MASK, VCCIO4_3V3 << IOVSEL4_SHIFT); in arch_cpu_init()
284 static struct rk3308_grf * const grf = (void *)GRF_BASE; in rk_board_init_f() local
297 rk_clrsetreg(&grf->soc_con15, mask, value); in rk_board_init_f()
307 static struct rk3308_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init() local
319 rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK, in board_debug_uart_init()
321 rk_clrsetreg(&grf->gpio1ch_iomux, GPIO1C7_MASK | GPIO1C6_MASK, in board_debug_uart_init()
327 rk_clrsetreg(&grf->soc_con5, UART2_IO_SEL_MASK, in board_debug_uart_init()
[all …]
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rv1108/
H A Drv1108.c21 struct rv1108_grf *grf = (void *)GRF_BASE; in board_debug_uart_init() local
36 rk_clrsetreg(&grf->gpio3a_iomux, /* UART0 */ in board_debug_uart_init()
53 rk_clrsetreg(&grf->gpio2d_iomux, /* UART2 */ in board_debug_uart_init()
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3128/
H A Drk3128.c49 struct rk3128_grf * const grf __maybe_unused = in board_debug_uart_init()
67 rk_clrsetreg(&grf->gpio1c_iomux, in board_debug_uart_init()
69 rk_clrsetreg(&grf->gpio1c_iomux, in board_debug_uart_init()
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk1808/
H A Drk1808.c92 struct rk1808_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init() local
95 rk_clrsetreg(&grf->iofunc_con0, UART2_IO_SEL_MASK, in board_debug_uart_init()
99 rk_clrsetreg(&grf->gpio4a_iomux_l, in board_debug_uart_init()
254 struct rk1808_grf * const grf = (void *)GRF_BASE; in mmc_gpio_init_direct() local
259 rk_clrsetreg(&grf->gpio1a_e, 0xffff, 0x5555); in mmc_gpio_init_direct()
260 rk_clrsetreg(&grf->gpio1b_e, 0xff, 0x00); in mmc_gpio_init_direct()
/rk3399_rockchip-uboot/arch/arm/dts/
H A Drk3xxx.dtsi178 rockchip,grf = <&grf>;
227 grf: grf@20008000 { label
237 rockchip,grf = <&grf>;
254 rockchip,grf = <&grf>;
269 rockchip,grf = <&grf>;
324 rockchip,grf = <&grf>;
339 rockchip,grf = <&grf>;
354 rockchip,grf = <&grf>;
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3066/
H A Drk3066.c17 struct rk3066_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init() local
20 rk_clrsetreg(&grf->gpio1b_iomux, in board_debug_uart_init()
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3188/
H A Drk3188.c16 struct rk3188_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init() local
18 rk_clrsetreg(&grf->gpio1b_iomux, in board_debug_uart_init()
/rk3399_rockchip-uboot/arch/arm/mach-rockchip/rk3036/
H A Drk3036.c20 struct rk3036_grf * const grf = (void *)GRF_BASE; in board_debug_uart_init() local
26 rk_clrsetreg(&grf->gpio1c_iomux, in board_debug_uart_init()

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