| #
a9b1eb66 |
| 11-Mar-2022 |
Frank Wang <frank.wang@rock-chips.com> |
phy: rockchip: inno-usb2/naneng-usb2: amend phy device get
Due to Linux mainline changed the usb-phy node name to "usb2phy@" from "usb2-phy@" since commit e71ccdff376b ("dt-bindings: phy: rename phy
phy: rockchip: inno-usb2/naneng-usb2: amend phy device get
Due to Linux mainline changed the usb-phy node name to "usb2phy@" from "usb2-phy@" since commit e71ccdff376b ("dt-bindings: phy: rename phy nodename in phy-rockchip-inno-usb2.yaml"), so add a fallback in U-Boot to make compatible.
Change-Id: I83941777ad9a26e7df75915710100a1a45dd0760 Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
show more ...
|
| #
d061f1ec |
| 29-Nov-2021 |
William Wu <william.wu@rock-chips.com> |
phy: rockchip: naneng-usb2: add vbus regulator support
Get vbus regulator from DT and manage it when phy power on/off for usb host function.
Signed-off-by: William Wu <william.wu@rock-chips.com> Ch
phy: rockchip: naneng-usb2: add vbus regulator support
Get vbus regulator from DT and manage it when phy power on/off for usb host function.
Signed-off-by: William Wu <william.wu@rock-chips.com> Change-Id: Ia6b707593bc1e13920846f9404be2f72f44df6d0
show more ...
|
| #
61c4c6b4 |
| 18-Jun-2020 |
Joseph Chen <chenjh@rock-chips.com> |
phy: rockchip: fix compile error
Report compile error if CONFIG_IO_TRACE=y.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com> Change-Id: I2cc791659a77c8c7d9fe01eed2c7b9ae052730bb
|
| #
5a157e97 |
| 12-May-2020 |
Joseph Chen <chenjh@rock-chips.com> |
Merge branch 'thunder-boot' into next-dev
|
| #
cdaaec08 |
| 30-Mar-2020 |
Ren Jianing <jianing.ren@rock-chips.com> |
phy: add a new driver for rockchip usb2 phy
This phy driver supports for rockchip SoCs with USB 2.0 PHY consist of Naneng PHY. It can be used for the otg phy and host phy, typically, otg phy is used
phy: add a new driver for rockchip usb2 phy
This phy driver supports for rockchip SoCs with USB 2.0 PHY consist of Naneng PHY. It can be used for the otg phy and host phy, typically, otg phy is used for DWC3, and the host phy is shared between the EHCI and OHCI controllers.
Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com> Change-Id: I76a8470dbc5ec789e60cee4ec8ad9a56e73c9841
show more ...
|