Lines Matching refs:grf
188 struct px30_grf *grf; in px30_gmac_fix_mac_speed() local
221 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in px30_gmac_fix_mac_speed()
222 rk_clrsetreg(&grf->mac_con1, PX30_GMAC_SPEED_MASK, speed); in px30_gmac_fix_mac_speed()
267 struct rk322x_grf *grf; in rk3228_gmac_fix_mac_speed() local
304 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3228_gmac_fix_mac_speed()
305 rk_clrsetreg(&grf->mac_con[1], in rk3228_gmac_fix_mac_speed()
318 struct rk3288_grf *grf; in rk3288_gmac_fix_mac_speed() local
336 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3288_gmac_fix_mac_speed()
337 rk_clrsetreg(&grf->soc_con1, RK3288_GMAC_CLK_SEL_MASK, clk); in rk3288_gmac_fix_mac_speed()
346 struct rk3308_grf *grf; in rk3308_gmac_fix_mac_speed() local
379 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3308_gmac_fix_mac_speed()
380 rk_clrsetreg(&grf->mac_con0, RK3308_GMAC_SPEED_MASK, speed); in rk3308_gmac_fix_mac_speed()
389 struct rk3328_grf_regs *grf; in rk3328_gmac_fix_mac_speed() local
426 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3328_gmac_fix_mac_speed()
427 rk_clrsetreg(pdata->integrated_phy ? &grf->mac_con[2] : &grf->mac_con[1], in rk3328_gmac_fix_mac_speed()
440 struct rk3368_grf *grf; in rk3368_gmac_fix_mac_speed() local
464 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3368_gmac_fix_mac_speed()
465 rk_clrsetreg(&grf->soc_con15, RK3368_GMAC_CLK_SEL_MASK, clk); in rk3368_gmac_fix_mac_speed()
474 struct rk3399_grf_regs *grf; in rk3399_gmac_fix_mac_speed() local
492 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3399_gmac_fix_mac_speed()
493 rk_clrsetreg(&grf->soc_con5, RK3399_GMAC_CLK_SEL_MASK, clk); in rk3399_gmac_fix_mac_speed()
502 struct rv1108_grf *grf; in rv1108_set_rmii_speed() local
527 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rv1108_set_rmii_speed()
528 rk_clrsetreg(&grf->gmac_con0, in rv1108_set_rmii_speed()
539 struct rk3506_grf_reg *grf; in rk3506_set_rmii_speed() local
549 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3506_set_rmii_speed()
564 rk_clrsetreg(&grf->soc_con11, RK3506_GMAC_CLK_RMII_DIV_MASK, div); in rk3506_set_rmii_speed()
566 rk_clrsetreg(&grf->soc_con8, RK3506_GMAC_CLK_RMII_DIV_MASK, div); in rk3506_set_rmii_speed()
575 struct rk3528_grf *grf; in rk3528_set_rgmii_speed() local
595 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3528_set_rgmii_speed()
624 rk_clrsetreg(&grf->gmac1_con0, RK3528_GMAC1_CLK_RGMII_DIV_MASK, div); in rk3528_set_rgmii_speed()
626 rk_clrsetreg(&grf->gmac0_con, RK3528_GMAC0_CLK_RMII_DIV_MASK, div); in rk3528_set_rgmii_speed()
635 struct rk3562_grf *grf; in rk3562_set_gmac_speed() local
662 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3562_set_gmac_speed()
669 rk_clrsetreg(&grf->soc_con[0], in rk3562_set_gmac_speed()
683 rk_clrsetreg(&grf->soc_con[0], in rk3562_set_gmac_speed()
705 rk_clrsetreg(&grf->soc_con[1], RK3562_GMAC1_CLK_RMII_DIV_MASK, div); in rk3562_set_gmac_speed()
707 rk_clrsetreg(&grf->soc_con[0], RK3562_GMAC0_CLK_RGMII_DIV_MASK, div); in rk3562_set_gmac_speed()
827 struct rv1103b_grf *grf; in rv1106_set_rmii_speed() local
829 struct rv1106_grf *grf; in rv1106_set_rmii_speed() local
840 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rv1106_set_rmii_speed()
854 rk_clrsetreg(&grf->gmac_clk_con, RV1106_GMAC_CLK_RMII_DIV_MASK, div); in rv1106_set_rmii_speed()
902 struct rv1126b_vi_grf_reg *grf; in rv1126b_set_rgmii_speed() local
914 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rv1126b_set_rgmii_speed()
940 rk_clrsetreg(&grf->gmac_grf_con0 + (0x50000 / 4), RV1126B_GMAC_CLK_RMII_DIV_MASK, div); in rv1126b_set_rgmii_speed()
949 struct px30_grf *grf; in px30_gmac_set_to_rmii() local
956 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in px30_gmac_set_to_rmii()
958 rk_clrsetreg(&grf->mac_con1, in px30_gmac_set_to_rmii()
965 struct rk1808_grf *grf; in rk1808_gmac_set_to_rgmii() local
987 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk1808_gmac_set_to_rgmii()
988 rk_clrsetreg(&grf->mac_con1, in rk1808_gmac_set_to_rgmii()
996 rk_clrsetreg(&grf->mac_con0, in rk1808_gmac_set_to_rgmii()
1005 struct rk322x_grf *grf; in rk3228_gmac_set_to_rgmii() local
1030 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3228_gmac_set_to_rgmii()
1031 rk_clrsetreg(&grf->mac_con[1], in rk3228_gmac_set_to_rgmii()
1040 rk_clrsetreg(&grf->mac_con[0], in rk3228_gmac_set_to_rgmii()
1049 struct rk322x_grf *grf; in rk3228_gmac_set_to_rmii() local
1059 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3228_gmac_set_to_rmii()
1060 rk_clrsetreg(&grf->mac_con[1], in rk3228_gmac_set_to_rmii()
1071 struct rk3288_grf *grf; in rk3288_gmac_set_to_rgmii() local
1073 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3288_gmac_set_to_rgmii()
1074 rk_clrsetreg(&grf->soc_con1, in rk3288_gmac_set_to_rgmii()
1078 rk_clrsetreg(&grf->soc_con3, in rk3288_gmac_set_to_rgmii()
1091 struct rk3308_grf *grf; in rk3308_gmac_set_to_rmii() local
1098 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3308_gmac_set_to_rmii()
1100 rk_clrsetreg(&grf->mac_con0, in rk3308_gmac_set_to_rmii()
1107 struct rk3328_grf_regs *grf; in rk3328_gmac_set_to_rgmii() local
1132 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3328_gmac_set_to_rgmii()
1133 rk_clrsetreg(&grf->mac_con[1], in rk3328_gmac_set_to_rgmii()
1142 rk_clrsetreg(&grf->mac_con[0], in rk3328_gmac_set_to_rgmii()
1151 struct rk3328_grf_regs *grf; in rk3328_gmac_set_to_rmii() local
1160 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3328_gmac_set_to_rmii()
1161 rk_clrsetreg(pdata->integrated_phy ? &grf->mac_con[2] : &grf->mac_con[1], in rk3328_gmac_set_to_rmii()
1170 struct rk3368_grf *grf; in rk3368_gmac_set_to_rgmii() local
1190 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3368_gmac_set_to_rgmii()
1191 rk_clrsetreg(&grf->soc_con15, in rk3368_gmac_set_to_rgmii()
1195 rk_clrsetreg(&grf->soc_con16, in rk3368_gmac_set_to_rgmii()
1208 struct rk3399_grf_regs *grf; in rk3399_gmac_set_to_rgmii() local
1210 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3399_gmac_set_to_rgmii()
1212 rk_clrsetreg(&grf->soc_con5, in rk3399_gmac_set_to_rgmii()
1216 rk_clrsetreg(&grf->soc_con6, in rk3399_gmac_set_to_rgmii()
1229 struct rv1108_grf *grf; in rv1108_gmac_set_to_rmii() local
1236 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rv1108_gmac_set_to_rmii()
1237 rk_clrsetreg(&grf->gmac_con0, in rv1108_gmac_set_to_rmii()
1244 struct rk322x_grf *grf; in rk3228_gmac_integrated_phy_powerup() local
1269 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3228_gmac_integrated_phy_powerup()
1270 rk_clrsetreg(&grf->con_iomux, in rk3228_gmac_integrated_phy_powerup()
1274 rk_clrsetreg(&grf->macphy_con[2], in rk3228_gmac_integrated_phy_powerup()
1278 rk_clrsetreg(&grf->macphy_con[3], in rk3228_gmac_integrated_phy_powerup()
1283 rk_clrsetreg(&grf->macphy_con[0], in rk3228_gmac_integrated_phy_powerup()
1296 rk_clrsetreg(&grf->macphy_con[0], in rk3228_gmac_integrated_phy_powerup()
1304 struct rk3328_grf_regs *grf; in rk3328_gmac_integrated_phy_powerup() local
1329 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3328_gmac_integrated_phy_powerup()
1330 rk_clrsetreg(&grf->macphy_con[1], in rk3328_gmac_integrated_phy_powerup()
1334 rk_clrsetreg(&grf->macphy_con[2], in rk3328_gmac_integrated_phy_powerup()
1338 rk_clrsetreg(&grf->macphy_con[3], in rk3328_gmac_integrated_phy_powerup()
1343 rk_clrsetreg(&grf->macphy_con[0], in rk3328_gmac_integrated_phy_powerup()
1356 rk_clrsetreg(&grf->macphy_con[0], in rk3328_gmac_integrated_phy_powerup()
1366 struct rk3506_grf_reg *grf; in rk3506_set_to_rmii() local
1374 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3506_set_to_rmii()
1378 rk_clrsetreg(&grf->soc_con11, RK3506_GMAC_CLK_RMII_MODE_MASK, clk_mode); in rk3506_set_to_rmii()
1380 rk_clrsetreg(&grf->soc_con8, RK3506_GMAC_CLK_RMII_MODE_MASK, clk_mode); in rk3506_set_to_rmii()
1385 struct rk3528_grf *grf; in rk3528_gmac_integrated_phy_powerup() local
1435 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3528_gmac_integrated_phy_powerup()
1439 rk_clrsetreg(&grf->macphy_con0, in rk3528_gmac_integrated_phy_powerup()
1449 rk_clrsetreg(&grf->macphy_con1, in rk3528_gmac_integrated_phy_powerup()
1460 struct rk3528_grf *grf; in rk3528_set_to_rmii() local
1474 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3528_set_to_rmii()
1478 rk_clrsetreg(&grf->gmac1_con1, RK3528_GMAC1_CLK_RMII_MODE_MASK, clk_mode); in rk3528_set_to_rmii()
1481 rk_clrsetreg(&grf->gmac0_con, RK3528_GMAC0_CLK_RMII_MODE_MASK, clk_mode); in rk3528_set_to_rmii()
1489 struct rk3528_grf *grf; in rk3528_set_to_rgmii() local
1516 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3528_set_to_rgmii()
1526 rk_clrsetreg(&grf->gmac1_con0, in rk3528_set_to_rgmii()
1533 rk_clrsetreg(&grf->gmac1_con1, in rk3528_set_to_rgmii()
1542 struct rk3562_grf *grf; in rk3562_set_to_rmii() local
1551 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3562_set_to_rmii()
1555 rk_clrsetreg(&grf->soc_con[0], RK3562_GMAC0_RMII_MODE_MASK, mode); in rk3562_set_to_rmii()
1561 struct rk3562_grf *grf; in rk3562_set_to_rgmii() local
1591 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3562_set_to_rgmii()
1594 rk_clrsetreg(&grf->soc_con[0], RK3562_GMAC0_RGMII_MODE_MASK, in rk3562_set_to_rgmii()
1630 struct rk3568_grf *grf; in rk3568_set_to_rmii() local
1639 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3568_set_to_rmii()
1642 con1 = &grf->mac1_con1; in rk3568_set_to_rmii()
1644 con1 = &grf->mac0_con1; in rk3568_set_to_rmii()
1653 struct rk3568_grf *grf; in rk3568_set_to_rgmii() local
1678 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3568_set_to_rgmii()
1681 con0 = &grf->mac1_con0; in rk3568_set_to_rgmii()
1682 con1 = &grf->mac1_con1; in rk3568_set_to_rgmii()
1684 con0 = &grf->mac0_con0; in rk3568_set_to_rgmii()
1685 con1 = &grf->mac0_con1; in rk3568_set_to_rgmii()
1817 struct rk3588_sys_grf *grf; in rk3588_set_to_rgmii() local
1848 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3588_set_to_rgmii()
1860 offset_con = &grf->soc_con9; in rk3588_set_to_rgmii()
1870 offset_con = &grf->soc_con8; in rk3588_set_to_rgmii()
1886 rk_clrsetreg(&grf->soc_con7, tx_enable_mask | rx_enable_mask, in rk3588_set_to_rgmii()
1895 struct rv1103b_grf *grf; in rv1103b_set_to_rmii() local
1901 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rv1103b_set_to_rmii()
1902 rk_clrsetreg(&grf->gmac_clk_con, in rv1103b_set_to_rmii()
1910 struct rv1103b_grf *grf; in rv1106_gmac_integrated_phy_powerup() local
1912 struct rv1106_grf *grf; in rv1106_gmac_integrated_phy_powerup()
1969 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rv1106_gmac_integrated_phy_powerup()
1973 rk_clrsetreg(&grf->macphy_con0, in rv1106_gmac_integrated_phy_powerup()
1983 rk_clrsetreg(&grf->macphy_con1, in rv1106_gmac_integrated_phy_powerup()
1993 struct rv1106_grf *grf; in rv1106_set_to_rmii() local
1999 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rv1106_set_to_rmii()
2000 rk_clrsetreg(&grf->gmac_clk_con, in rv1106_set_to_rmii()
2007 struct rv1126_grf *grf; in rv1126_set_to_rmii() local
2015 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rv1126_set_to_rmii()
2017 rk_clrsetreg(&grf->mac_con0, in rv1126_set_to_rmii()
2024 struct rv1126_grf *grf; in rv1126_set_to_rgmii() local
2062 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rv1126_set_to_rgmii()
2064 rk_clrsetreg(&grf->mac_con0, in rv1126_set_to_rgmii()
2076 rk_clrsetreg(&grf->mac_con1, in rv1126_set_to_rgmii()
2082 rk_clrsetreg(&grf->mac_con2, in rv1126_set_to_rgmii()
2091 struct rv1126b_vi_grf_reg *grf; in rv1126b_gmac_integrated_phy_powerup() local
2112 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rv1126b_gmac_integrated_phy_powerup()
2114 writel(0, &grf->rkmacphy_grf_con1 + (0x50000 / 4)); in rv1126b_gmac_integrated_phy_powerup()
2122 writel(value, &grf->rkmacphy_grf_con2 + (0x50000 / 4)); in rv1126b_gmac_integrated_phy_powerup()
2126 writel(value, &grf->rkmacphy_grf_con0 + (0x50000 / 4)); in rv1126b_gmac_integrated_phy_powerup()
2131 writel(value, &grf->rkmacphy_grf_con1 + (0x50000 / 4)); in rv1126b_gmac_integrated_phy_powerup()
2138 struct rv1126b_vi_grf_reg *grf; in rv1126b_set_to_rmii() local
2147 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rv1126b_set_to_rmii()
2150 rk_clrsetreg(&grf->gmac_grf_con0 + (0x50000 / 4), in rv1126b_set_to_rmii()
2154 rk_clrsetreg(&grf->gmac_grf_con0 + (0x50000 / 4), in rv1126b_set_to_rmii()
2161 struct rv1126b_vi_grf_reg *grf; in rv1126b_set_to_rgmii() local
2190 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rv1126b_set_to_rgmii()
2194 rk_clrsetreg(&grf->gmac_grf_con0 + (0x50000 / 4), in rv1126b_set_to_rgmii()
2233 struct rk3506_grf_reg *grf; in rk3506_set_clock_selection() local
2243 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3506_set_clock_selection()
2249 rk_clrsetreg(&grf->soc_con11, RK3506_GMAC_CLK_SELET_MASK, val); in rk3506_set_clock_selection()
2251 rk_clrsetreg(&grf->soc_con8, RK3506_GMAC_CLK_SELET_MASK, val); in rk3506_set_clock_selection()
2256 struct rk3528_grf *grf; in rk3528_set_clock_selection() local
2268 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3528_set_clock_selection()
2272 rk_clrsetreg(&grf->gmac1_con0, RK3528_GMAC1_CLK_SELET_MASK, val); in rk3528_set_clock_selection()
2277 struct rk3562_grf *grf; in rk3562_set_clock_selection() local
2309 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rk3562_set_clock_selection()
2315 rk_clrsetreg(&grf->soc_con[0], RK3562_GMAC0_CLK_SELET_MASK, val); in rk3562_set_clock_selection()
2326 rk_clrsetreg(&grf->soc_con[1], RK3562_GMAC1_CLK_SELET_MASK, val); in rk3562_set_clock_selection()
2384 struct rv1126b_vi_grf_reg *grf; in rv1126b_set_clock_selection() local
2393 grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); in rv1126b_set_clock_selection()
2397 rk_clrsetreg(&grf->gmac_grf_con0 + (0x50000 / 4), RV1126B_GMAC_CLK_SELET_MASK, val); in rv1126b_set_clock_selection()