| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | zynqmp.dtsi | 224 interrupt-parent = <&gic>;
243 interrupt-parent = <&gic>;
264 gic: interrupt-controller@f9010000 { label
265 compatible = "arm,gic-400", "arm,cortex-a15-gic";
272 interrupt-parent = <&gic>;
290 interrupt-parent = <&gic>;
302 interrupt-parent = <&gic>;
318 interrupt-parent = <&gic>;
332 interrupt-parent = <&gic>;
345 interrupt-parent = <&gic>;
[all …]
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| H A D | exynos4210.dtsi | 40 gic: interrupt-controller@10490000 { label
64 interrupt-map = <0 &gic 0 57 0>,
65 <1 &gic 0 69 0>,
68 <4 &gic 0 42 0>,
69 <5 &gic 0 48 0>;
98 interrupt-parent = <&gic>;
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| H A D | keystone-k2g.dtsi | 11 #include <dt-bindings/interrupt-controller/arm-gic.h>
17 interrupt-parent = <&gic>;
37 interrupt-parent = <&gic>;
46 gic: interrupt-controller { label
47 compatible = "arm,cortex-a15-gic";
62 interrupt-parent = <&gic>;
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| H A D | exynos5.dtsi | 30 gic: interrupt-controller@10481000 { label
31 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
64 gic: interrupt-controller@10481000 { label
65 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
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| H A D | armada-ap806.dtsi | 47 #include <dt-bindings/interrupt-controller/arm-gic.h>
71 interrupt-parent = <&gic>;
80 gic: interrupt-controller@210000 { label
81 compatible = "arm,gic-400";
94 compatible = "arm,gic-v2m-frame";
101 compatible = "arm,gic-v2m-frame";
108 compatible = "arm,gic-v2m-frame";
115 compatible = "arm,gic-v2m-frame";
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| H A D | keystone.dtsi | 9 #include <dt-bindings/interrupt-controller/arm-gic.h>
18 interrupt-parent = <&gic>;
38 gic: interrupt-controller { label
39 compatible = "arm,cortex-a15-gic";
75 interrupt-parent = <&gic>;
311 interrupt-parent = <&gic>;
325 interrupt-parent = <&gic>;
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| H A D | hi6220.dtsi | 7 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&gic>;
113 gic: interrupt-controller@f6801000 { label
114 compatible = "arm,gic-400";
127 interrupt-parent = <&gic>;
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| H A D | exynos4x12.dtsi | 55 interrupt-map = <0 &gic 0 57 0>,
59 <4 &gic 1 12 0>;
76 interrupt-parent = <&gic>;
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| H A D | sun8i-r40.dtsi | 45 #include <dt-bindings/interrupt-controller/arm-gic.h>
50 interrupt-parent = <&gic>;
162 gic: interrupt-controller@1c81000 { label
163 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
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| H A D | keystone-k2e.dtsi | 16 interrupt-parent = <&gic>;
113 interrupt-parent = <&gic>;
127 interrupt-parent = <&gic>;
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| H A D | fsl-ls1012a.dtsi | 11 interrupt-parent = <&gic>;
20 gic: interrupt-controller@1400000 { label
21 compatible = "arm,gic-400";
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| H A D | armada-375.dtsi | 49 #include <dt-bindings/interrupt-controller/arm-gic.h>
110 interrupt-parent = <&gic>;
199 gic: interrupt-controller@d000 { label
200 compatible = "arm,cortex-a9-gic";
423 interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
424 <&gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
425 <&gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
426 <&gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
614 interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
631 interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
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| H A D | sun8i-a83t.dtsi | 48 #include <dt-bindings/interrupt-controller/arm-gic.h>
53 interrupt-parent = <&gic>;
217 gic: interrupt-controller@01c81000 { label
218 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
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| H A D | tegra186.dtsi | 4 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 interrupt-parent = <&gic>;
159 gic: interrupt-controller@3881000 { label
160 compatible = "arm,gic-400";
169 interrupt-parent = <&gic>;
234 interrupt-map = <0 0 0 0 &gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
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| H A D | sun8i-v3s.dtsi | 45 #include <dt-bindings/interrupt-controller/arm-gic.h>
51 interrupt-parent = <&gic>;
273 gic: interrupt-controller@01c81000 { label
274 compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
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| H A D | armada-38x.dtsi | 50 #include <dt-bindings/interrupt-controller/arm-gic.h>
77 interrupt-parent = <&gic>;
162 gic: interrupt-controller@d000 { label
163 compatible = "arm,cortex-a9-gic";
393 interrupts-extended = <&gic GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
394 <&gic GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
395 <&gic GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>,
396 <&gic GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>,
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| H A D | ls1021a.dtsi | 10 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 interrupt-parent = <&gic>;
64 interrupt-parent = <&gic>;
67 gic: interrupt-controller@1400000 { label
68 compatible = "arm,cortex-a7-gic";
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| H A D | armada-385.dtsi | 119 interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
137 interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
155 interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
176 interrupt-map = <0 0 0 0 &gic GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
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| H A D | fsl-ls2080a.dtsi | 11 interrupt-parent = <&gic>;
21 gic: interrupt-controller@6000000 { label
22 compatible = "arm,gic-v3";
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| H A D | armada-37xx.dtsi | 47 #include <dt-bindings/interrupt-controller/arm-gic.h>
53 interrupt-parent = <&gic>;
232 gic: interrupt-controller@1d00000 { label
233 compatible = "arm,gic-v3";
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| H A D | armada-380.dtsi | 108 interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
126 interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
144 interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
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| H A D | armada-cp110-slave.dtsi | 54 interrupt-parent = <&gic>;
61 interrupt-parent = <&gic>;
281 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>;
307 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 258 IRQ_TYPE_LEVEL_HIGH>;
334 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH>;
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| /rk3399_rockchip-uboot/drivers/irq/ |
| H A D | irq-generic.c | 23 struct irq_chip *gic; member
76 assert(irqchip.gic->irq_get); in __do_generic_irq_handler()
77 assert(irqchip.gic->irq_eoi); in __do_generic_irq_handler()
79 irq = irqchip.gic->irq_get(); in __do_generic_irq_handler()
88 irqchip.gic->irq_eoi(irq); in __do_generic_irq_handler()
119 irqchip.gic = arch_gic_get_irqchip(); in __do_arch_irq_init()
120 if (bad_irq_chip(irqchip.gic)) { in __do_arch_irq_init()
137 ret = irqchip.gic->irq_init(); in __do_arch_irq_init()
171 ret = irqchip.gic->irq_enable(irq); in irq_handler_enable()
191 ret = irqchip.gic->irq_disable(irq); in irq_handler_disable()
[all …]
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| H A D | Makefile | 7 obj-y += irq-gic.o
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| /rk3399_rockchip-uboot/arch/mips/dts/ |
| H A D | img,boston.dts | 6 #include <dt-bindings/interrupt-controller/mips-gic.h>
34 gic: interrupt-controller { label
35 compatible = "mti,gic";
41 compatible = "mti,gic-timer";
57 interrupt-parent = <&gic>;
86 interrupt-parent = <&gic>;
114 interrupt-parent = <&gic>;
204 interrupt-parent = <&gic>;
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