Merge tag 'xilinx-for-v2017.03' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2017.03

- ATF handoff
- DT syncups
- gem: Use wait_for_bit(), add simple clk support
- Simple clk driv

Merge tag 'xilinx-for-v2017.03' of git://www.denx.de/git/u-boot-microblaze

Xilinx changes for v2017.03

- ATF handoff
- DT syncups
- gem: Use wait_for_bit(), add simple clk support
- Simple clk driver for ZynqMP
- Other small changes

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ARM64: zynqmp: Fix i2c node's compatible string

The Zynq Ultrascale MP uses version 1.4 of the Cadence IP core
which fixes some silicon bugs that needed software workarounds
in Version 1.0 that was

ARM64: zynqmp: Fix i2c node's compatible string

The Zynq Ultrascale MP uses version 1.4 of the Cadence IP core
which fixes some silicon bugs that needed software workarounds
in Version 1.0 that was used on Zynq systems.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Michal Simek <michal.simek@xilinx.com>
Cc: Heiko Schocher <hs@denx.de>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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ARM64: zynqmp: Add idle state for ZynqMP

Added the idle-states node to describe zynqmp idle states. Only cpu-sleep-0
idle state is added in this patch. References to the idle-states node are
added i

ARM64: zynqmp: Add idle state for ZynqMP

Added the idle-states node to describe zynqmp idle states. Only cpu-sleep-0
idle state is added in this patch. References to the idle-states node are
added in all CPU nodes. Time values: entry/exit latencies and min-residency,
needs to be tuned. arm,psci-suspend-param is selected to comply with PSCIv1.0
and Extended StateID format.

Signed-off-by: Stefan Krsmanovic <stefan.krsmanovic@aggios.com>
Acked-by: Will Wong <willw@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Merge branch 'master' of git://www.denx.de/git/u-boot-microblaze

ARM64: zynqmp: Add one empty line between license and nodes

Sync with Linux kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>

ARM64: zynqmp: Adding prefetchable memory space to pcie

Adding prefetchable memory space to pcie device tree node.
Shifting configuration space to 64-bit address space.
Removing pcie device tree nod

ARM64: zynqmp: Adding prefetchable memory space to pcie

Adding prefetchable memory space to pcie device tree node.
Shifting configuration space to 64-bit address space.
Removing pcie device tree node from amba as it requires size-cells=<2>
in order to access 64-bit address space.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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ARM64: zynqmp: Add clocks for LPDDMA

Zynqmp DMA driver expects two clocks (main clock and apb clock)
For LPDDMA channels the two clocks are missing in the
Dma node resulting probe failure.

xilinx-z

ARM64: zynqmp: Add clocks for LPDDMA

Zynqmp DMA driver expects two clocks (main clock and apb clock)
For LPDDMA channels the two clocks are missing in the
Dma node resulting probe failure.

xilinx-zynqmp-dma ffa80000.dma: main clock not found.
xilinx-zynqmp-dma ffa80000.dma: Probing channel failed
xilinx-zynqmp-dma: probe of ffa80000.dma failed with error -2

This patch fixes this issue.

Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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ARM64: zynqmp: Add description for LPDDMA channel usage

LPDDMA default allows only secured access.
inorder to enable these dma channels,
one should ensure that it allows non secure access.
This patc

ARM64: zynqmp: Add description for LPDDMA channel usage

LPDDMA default allows only secured access.
inorder to enable these dma channels,
one should ensure that it allows non secure access.
This patch updates the same.

Reported-by: Sai Pavan Boddu <saipava@xilinx.com>
Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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ARM64: zynqmp: Use 64bit size cell format for main amba bus

Use 64bit size cell for main amba bus instead of 32bit because PCIe
node requires it Change 64bit sizes also for all others IPs.

Signed-o

ARM64: zynqmp: Use 64bit size cell format for main amba bus

Use 64bit size cell for main amba bus instead of 32bit because PCIe
node requires it Change 64bit sizes also for all others IPs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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ARM64: zynqmp: Add ocm node in dtsi

This patch adds ocm controller node in zynqmp.dtsi.
needed for OCM edac support.

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Micha

ARM64: zynqmp: Add ocm node in dtsi

This patch adds ocm controller node in zynqmp.dtsi.
needed for OCM edac support.

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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ARM64: zynqmp: Add device tree properties for ZynqMP GT core

This patch adds the ZynqMP GT core device-tree properties for
zynqmp.dtsi file.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com

ARM64: zynqmp: Add device tree properties for ZynqMP GT core

This patch adds the ZynqMP GT core device-tree properties for
zynqmp.dtsi file.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Tested-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Revert "ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodes"

This reverts commit bd750e7a6c515c081b72d4ef108a2bfa691a3fd1

Implemented the new workaround for auto tuning based on
zynqmp co

Revert "ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodes"

This reverts commit bd750e7a6c515c081b72d4ef108a2bfa691a3fd1

Implemented the new workaround for auto tuning based on
zynqmp compatible string, so removed the 'broken-tuning'
property.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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ARM64: zynqmp: change sdhci compatible string.

This patch changes the compatible string for sdhci node,
adds "xlnx,device_id" and "xlnx,mio_bank" property to sdhci node.

Signed-off-by: Sai Krishna

ARM64: zynqmp: change sdhci compatible string.

This patch changes the compatible string for sdhci node,
adds "xlnx,device_id" and "xlnx,mio_bank" property to sdhci node.

Signed-off-by: Sai Krishna Potthuri <lakshmis@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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ARM64: zynqmp: List all SMMU ids

Add SMMU description for all tested IPs.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Add support for zynqmp fpga manager

Add support for zynqmp fpga manager.

Signed-off-by: Nava kishore Manne <navam@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Add cortexa53 edac node

This patch adds edac node for arm cortexa53 to report
errors on L1 and L2 caches.

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: M

ARM64: zynqmp: Add cortexa53 edac node

This patch adds edac node for arm cortexa53 to report
errors on L1 and L2 caches.

Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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Revert "ARM64: zynqmp: Add serdes address space dp driver"

This reverts commit 786db82bd5bf09cc8f78c8b14445e843d7566b1c.

Since we are using serdes driver , no need of mapping serdes register
space

Revert "ARM64: zynqmp: Add serdes address space dp driver"

This reverts commit 786db82bd5bf09cc8f78c8b14445e843d7566b1c.

Since we are using serdes driver , no need of mapping serdes register
space into DP driver.

Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Tested-by: Hyun Kwon <hyunk@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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ARM64: zynqmp: drm: Add DMA index

Each plane can be associated with multiple DMA channels. So add
index for each DMA channel.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal S

ARM64: zynqmp: drm: Add DMA index

Each plane can be associated with multiple DMA channels. So add
index for each DMA channel.

Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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ARM64: zynqmp: Sync gpio node properties

Keep dtsi in sync with mainline kernel.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: Remove xlnx,id property

Remove unused xlnx,id property because it is not the part of
DT binding.

Signed-off-by: Michal Simek <michal.simek@xilinx.com>

ARM64: zynqmp: pci: Updating device tree as per upstream

Updating required device tree changes as per mainlined driver
from 4.6 kernel.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Sign

ARM64: zynqmp: pci: Updating device tree as per upstream

Updating required device tree changes as per mainlined driver
from 4.6 kernel.

Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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ARM64: zynqmp: Support for multiple PM IDs assigned to a PM domain

Previously, it was assumed that there is a 1:1 mapping between
PM ID defined in the platform firmware and a PM domain. However, the

ARM64: zynqmp: Support for multiple PM IDs assigned to a PM domain

Previously, it was assumed that there is a 1:1 mapping between
PM ID defined in the platform firmware and a PM domain. However, there
can be a situation where multiple PM IDs belong to a single PM domain
(e.g. PM IDs for GPU and two pixel processors correspond to a single
PM domain).

This patch adds support for assigning more than one PM ID to
a single PM domain.

Updated documentation accordingly.

Assigned pixel processors PM IDs to GPU PM domain.

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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ARM64: zynqmp: DT: Add PM domains for GPU and PCIE

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <mich

ARM64: zynqmp: DT: Add PM domains for GPU and PCIE

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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ARM64: zynqmp: DT: Remove unused PM domains for PLL

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.s

ARM64: zynqmp: DT: Remove unused PM domains for PLL

Signed-off-by: Filip Drazic <filip.drazic@aggios.com>
Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>

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