History log of /rk3399_rockchip-uboot/arch/arm/dts/fsl-ls1012a.dtsi (Results 1 – 11 of 11)
Revision Date Author Comments
# 797f165f 04-Apr-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-fsl-qoriq


# 2652a28f 21-Feb-2017 Suresh Gupta <suresh.gupta@nxp.com>

armv8: dts: fsl-ls1012a: Change number of CS in SPI node

LS1012A has only one chip select for QSPI flash.

Signed-off-by: Suresh Gupta <suresh.gupta@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>


# 0675f992 19-Jan-2017 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-fsl-qoriq


# e1f39751 07-Dec-2016 Yangbo Lu <yangbo.lu@nxp.com>

armv8: ls1012a: add eSDHC nodes

This patch is to add eSDHC nodes for ls1012a.

Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>


# a7305874 27-Dec-2016 Tang Yuantian <Yuantian.Tang@nxp.com>

armv8: ls1012: added usb nodes in dts

The LS1012A processor has two integrated USB controllers.
One is USB2.0 controller, the other is USB3.0 controller that
allow direct connection to the USB ports

armv8: ls1012: added usb nodes in dts

The LS1012A processor has two integrated USB controllers.
One is USB2.0 controller, the other is USB3.0 controller that
allow direct connection to the USB ports with appropriate
protection circuitry and power supplies.

Signed-off-by: Tang Yuantian <yuantian.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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# 048a0453 13-Dec-2016 Minghuan Lian <Minghuan.Lian@nxp.com>

arm: ls1012a: add PCIe dts node

Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>


# 44faff24 28-Jun-2016 Tom Rini <trini@konsulko.com>

Merge git://git.denx.de/u-boot-fsl-qoriq


# dee01e42 14-Jun-2016 Abhimanyu Saini <abhimanyu.saini@nxp.com>

armv8: dts: fsl: Remove cpu nodes from Layerscape DTSIs

Currently layescape SoCs are not using cpu nodes. So removing
them in favour of compatibly with similar SoCs that
have different cores like L

armv8: dts: fsl: Remove cpu nodes from Layerscape DTSIs

Currently layescape SoCs are not using cpu nodes. So removing
them in favour of compatibly with similar SoCs that
have different cores like LS2080A and LS2088A.

This has been tested on LS2080AQDS, LS1043ARDB, LS1012ARDB.

Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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# dc557e9a 18-Jun-2016 Stefano Babic <sbabic@denx.de>

Merge branch 'master' of git://git.denx.de/u-boot

Signed-off-by: Stefano Babic <sbabic@denx.de>


# c41c649c 04-Jun-2016 Tom Rini <trini@konsulko.com>

Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq


# 9d044fcb 03-Jun-2016 Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>

armv8: ls1012a: Add support of ls1012aqds board

QorIQ LS1012A Development System (LS1012AQDS) is a high-performance
development platform, with a complete debugging environment.
The LS1012AQDS board

armv8: ls1012a: Add support of ls1012aqds board

QorIQ LS1012A Development System (LS1012AQDS) is a high-performance
development platform, with a complete debugging environment.
The LS1012AQDS board supports the QorIQ LS1012A processor and is
optimized to support the high-bandwidth DDR3L memory and
a full complement of high-speed SerDes ports.

Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com>
Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com>
Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com>
Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>

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