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Searched refs:edid (Results 1 – 25 of 31) sorted by relevance

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/rk3399_rockchip-uboot/common/
H A Dedid.c36 #define version_greater(edid, maj, min) \ argument
37 (((edid)->version > (maj)) || \
38 ((edid)->version == (maj) && (edid)->revision > (min)))
75 struct edid *edid; member
1731 int edid_get_ranges(struct edid1_info *edid, unsigned int *hmin, in edid_get_ranges() argument
1739 if (edid_check_info(edid)) in edid_get_ranges()
1742 for (i = 0; i < ARRAY_SIZE(edid->monitor_details.descriptor); i++) { in edid_get_ranges()
1743 monitor = &edid->monitor_details.descriptor[i]; in edid_get_ranges()
1888 static bool edid_vendor(struct edid *edid, char *vendor) in edid_vendor() argument
1892 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; in edid_vendor()
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H A DMakefile69 obj-$(CONFIG_$(SPL_TPL_)I2C_EDID) += edid.o
/rk3399_rockchip-uboot/drivers/video/
H A Ddw_hdmi.c390 const struct display_timing *edid) in hdmi_av_composer() argument
397 hbl = edid->hback_porch.typ + edid->hfront_porch.typ + in hdmi_av_composer()
398 edid->hsync_len.typ; in hdmi_av_composer()
399 vbl = edid->vback_porch.typ + edid->vfront_porch.typ + in hdmi_av_composer()
400 edid->vsync_len.typ; in hdmi_av_composer()
405 inv_val |= (edid->flags & DISPLAY_FLAGS_HSYNC_HIGH ? in hdmi_av_composer()
409 inv_val |= (edid->flags & DISPLAY_FLAGS_VSYNC_HIGH ? in hdmi_av_composer()
417 inv_val |= (edid->hdmi_monitor ? in hdmi_av_composer()
428 hdmi_write(hdmi, edid->hactive.typ >> 8, HDMI_FC_INHACTV1); in hdmi_av_composer()
429 hdmi_write(hdmi, edid->hactive.typ, HDMI_FC_INHACTV0); in hdmi_av_composer()
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/rk3399_rockchip-uboot/drivers/video/rockchip/
H A Drk_vop.c38 const struct display_timing *edid) in rkvop_enable() argument
42 u32 hactive = edid->hactive.typ; in rkvop_enable()
43 u32 vactive = edid->vactive.typ; in rkvop_enable()
48 writel(V_DSP_XST(edid->hsync_len.typ + edid->hback_porch.typ) | in rkvop_enable()
49 V_DSP_YST(edid->vsync_len.typ + edid->vback_porch.typ), in rkvop_enable()
138 const struct display_timing *edid, in rkvop_mode_set() argument
146 u32 hactive = edid->hactive.typ; in rkvop_mode_set()
147 u32 vactive = edid->vactive.typ; in rkvop_mode_set()
148 u32 hsync_len = edid->hsync_len.typ; in rkvop_mode_set()
149 u32 hback_porch = edid->hback_porch.typ; in rkvop_mode_set()
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H A Drk3399_hdmi.c24 const struct display_timing *edid) in rk3399_hdmi_enable() argument
35 return dw_hdmi_enable(&priv->hdmi, edid); in rk3399_hdmi_enable()
H A Drk3288_hdmi.c24 const struct display_timing *edid) in rk3288_hdmi_enable() argument
H A Drk_lvds.c52 const struct display_timing *edid) in rk_lvds_enable() argument
H A Drk_edp.c695 unsigned int val_addr, unsigned int count, u8 edid[]) in rk_edp_i2c_read() argument
754 edid[i + cur_data_idx] = (u8)val; in rk_edp_i2c_read()
932 const struct display_timing *edid) in rk_edp_enable() argument
/rk3399_rockchip-uboot/drivers/video/sunxi/
H A Dsunxi_dw_hdmi.c243 static void sunxi_dw_hdmi_lcdc_init(int mux, const struct display_timing *edid, in sunxi_dw_hdmi_lcdc_init() argument
248 int div = sunxi_dw_hdmi_get_divider(edid->pixelclock.typ); in sunxi_dw_hdmi_lcdc_init()
274 lcdc_tcon1_mode_set(lcdc, edid, false, false); in sunxi_dw_hdmi_lcdc_init()
294 const struct display_timing *edid) in sunxi_dw_hdmi_enable() argument
301 ret = dw_hdmi_enable(&priv->hdmi, edid); in sunxi_dw_hdmi_enable()
305 sunxi_dw_hdmi_lcdc_init(priv->mux, edid, panel_bpp); in sunxi_dw_hdmi_enable()
312 if (!((edid->flags & DISPLAY_FLAGS_HSYNC_HIGH) && in sunxi_dw_hdmi_enable()
313 (edid->flags & DISPLAY_FLAGS_VSYNC_HIGH))) { in sunxi_dw_hdmi_enable()
/rk3399_rockchip-uboot/doc/
H A DREADME.video46 format, if edid is used the format is automatically selected.
65 - edid=[0|1] - Enable use of DDC + EDID to get monitor info
69 Defaults to edid=1.
77 using edid info when available and otherwise initalizing it at 1024x768@60Hz,
78 use: "setenv video-mode sunxi:1024x768-24@60,monitor=dvi,hpd=0,edid=1".
/rk3399_rockchip-uboot/drivers/video/drm/
H A Dsii902x.c341 struct edid *edid = (struct edid *)conn_state->edid; in sii902x_bridge_mode_set() local
350 if (drm_detect_hdmi_monitor(edid)) in sii902x_bridge_mode_set()
732 conn_state->edid = drm_do_get_edid(&sii902x->adap); in sii902x_get_timing()
733 if (conn_state->edid) in sii902x_get_timing()
734 ret = drm_add_edid_modes(&sii902x->edid_data, conn_state->edid); in sii902x_get_timing()
H A Dinno_hdmi.c746 struct edid *edid = (struct edid *)conn_state->edid; in rockchip_inno_hdmi_get_timing() local
752 conn_state->edid = drm_do_get_edid(&hdmi->adap); in rockchip_inno_hdmi_get_timing()
753 if (conn_state->edid) { in rockchip_inno_hdmi_get_timing()
755 drm_detect_hdmi_monitor(edid); in rockchip_inno_hdmi_get_timing()
756 hdmi->hdmi_data.sink_has_audio = drm_detect_monitor_audio(edid); in rockchip_inno_hdmi_get_timing()
757 ret = drm_add_edid_modes(&hdmi->edid_data, conn_state->edid); in rockchip_inno_hdmi_get_timing()
H A Ddw_hdmi_qp.c1464 struct edid *edid = (struct edid *)conn_state->edid; in _rockchip_dw_hdmi_qp_get_timing() local
1471 if (edid) { in _rockchip_dw_hdmi_qp_get_timing()
1473 drm_detect_hdmi_monitor(edid); in _rockchip_dw_hdmi_qp_get_timing()
1474 hdmi->sink_has_audio = drm_detect_monitor_audio(edid); in _rockchip_dw_hdmi_qp_get_timing()
1475 ret = drm_add_edid_modes(&hdmi->edid_data, conn_state->edid); in _rockchip_dw_hdmi_qp_get_timing()
1510 conn_state->edid = drm_do_get_edid(&hdmi->adap); in rockchip_dw_hdmi_qp_get_timing()
1538 conn_state->edid = drm_do_get_edid(&hdmi->adap); in rockchip_dw_hdmi_qp_get_edid()
1539 if (!conn_state->edid) in rockchip_dw_hdmi_qp_get_edid()
H A Ddw_hdmi.c2638 struct edid *edid = (struct edid *)conn_state->edid; in rockchip_dw_hdmi_get_timing() local
2644 conn_state->edid = drm_do_get_edid(&hdmi->adap); in rockchip_dw_hdmi_get_timing()
2646 if (conn_state->edid) { in rockchip_dw_hdmi_get_timing()
2647 hdmi->sink_has_audio = drm_detect_monitor_audio(edid); in rockchip_dw_hdmi_get_timing()
2651 hdmi->sink_is_hdmi = drm_detect_hdmi_monitor(edid); in rockchip_dw_hdmi_get_timing()
2653 ret = drm_add_edid_modes(&hdmi->edid_data, conn_state->edid); in rockchip_dw_hdmi_get_timing()
2718 conn_state->edid = drm_do_get_edid(&hdmi->adap); in rockchip_dw_hdmi_get_edid()
2719 if (!conn_state->edid) in rockchip_dw_hdmi_get_edid()
H A Danalogix_dp.h664 unsigned char edid[EDID_BLOCK_LENGTH * 2]; member
716 unsigned char edid[]);
H A Danalogix_dp.c926 conn_state->edid = drm_do_get_edid(&dp->aux.ddc); in analogix_dp_connector_get_edid()
927 if (!conn_state->edid) in analogix_dp_connector_get_edid()
1237 conn_state->edid = drm_do_get_edid(&dp->aux.ddc); in analogix_dp_connector_get_timing()
1238 if (conn_state->edid) in analogix_dp_connector_get_timing()
1239 ret = drm_add_edid_modes(&edid_data, conn_state->edid); in analogix_dp_connector_get_timing()
H A Drockchip_display.h261 u8 *edid; member
H A Ddw-dp.c1467 conn_state->edid = drm_do_get_edid(&dp->aux.ddc); in dw_dp_connector_get_edid()
1468 if (!conn_state->edid) in dw_dp_connector_get_edid()
1654 conn_state->edid = drm_do_get_edid(&dp->aux.ddc); in dw_dp_connector_get_timing()
1655 if (conn_state->edid) in dw_dp_connector_get_timing()
1656 ret = drm_add_edid_modes(&edid_data, conn_state->edid); in dw_dp_connector_get_timing()
/rk3399_rockchip-uboot/drivers/video/exynos/
H A Dexynos_dp.c71 unsigned char edid[EDID_BLOCK_LENGTH * 2]; in exynos_dp_read_edid() local
95 &edid[EDID_HEADER_PATTERN]); in exynos_dp_read_edid()
100 sum = exynos_dp_calc_edid_check_sum(edid); in exynos_dp_read_edid()
111 &edid[EDID_BLOCK_LENGTH]); in exynos_dp_read_edid()
116 sum = exynos_dp_calc_edid_check_sum(&edid[EDID_BLOCK_LENGTH]); in exynos_dp_read_edid()
127 edid[EDID_BLOCK_LENGTH + EDID_CHECKSUM]); in exynos_dp_read_edid()
140 &edid[EDID_HEADER_PATTERN]); in exynos_dp_read_edid()
146 sum = exynos_dp_calc_edid_check_sum(edid); in exynos_dp_read_edid()
156 DPCD_TEST_EDID_CHECKSUM, edid[EDID_CHECKSUM]); in exynos_dp_read_edid()
H A Dexynos_dp_lowlevel.h51 unsigned char edid[]);
/rk3399_rockchip-uboot/include/
H A Dedid.h754 struct edid { struct
984 int edid_get_ranges(struct edid1_info *edid, unsigned int *hmin,
1020 int drm_add_edid_modes(struct hdmi_edid_data *data, u8 *edid);
1023 bool drm_detect_hdmi_monitor(struct edid *edid);
1024 bool drm_detect_monitor_audio(struct edid *edid);
H A Ddw_hdmi.h482 int dw_hdmi_enable(struct dw_hdmi *hdmi, const struct display_timing *edid);
/rk3399_rockchip-uboot/drivers/video/bridge/
H A Danx6345.c24 u8 edid[EDID_SIZE]; member
261 ret = anx6345_read_aux_i2c(dev, 0x50, 0x0, EDID_SIZE, priv->edid); in anx6345_read_edid()
269 memcpy(buf, priv->edid, size); in anx6345_read_edid()
360 if (edid_get_timing(priv->edid, EDID_SIZE, &timing, &bpp) != 0) { in anx6345_enable()
/rk3399_rockchip-uboot/cmd/
H A Di2c.c1657 struct edid1_info edid; in do_edid() local
1672 ret = dm_i2c_read(dev, 0, (uchar *)&edid, sizeof(edid)); in do_edid()
1674 ret = i2c_read(chip, 0, 1, (uchar *)&edid, sizeof(edid)); in do_edid()
1679 if (edid_check_info(&edid)) { in do_edid()
1684 edid_print_info(&edid); in do_edid()
1960 U_BOOT_CMD_MKENT(edid, 1, 1, do_edid, "", ""),
/rk3399_rockchip-uboot/doc/device-tree-bindings/gpu/
H A Dnvidia,tegra20-host1x.txt130 - nvidia,edid: supplies a binary EDID blob
156 - nvidia,edid: supplies a binary EDID blob
192 - nvidia,edid: supplies a binary EDID blob
216 - nvidia,edid: supplies a binary EDID blob

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