edid: Support hdmi2.1 extend block

Support getting HF-EEODB and HF-SCDB from edid.

Change-Id: Ib1bfe76d1e58c1346e4a0a6105a623a7ac8c8a3a
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

edid: Don't send non-zero YQ in AVI infoframe for HDMI 1.x sinks

Apparently some sinks look at the YQ bits even when receiving RGB,
and they get somehow confused when they see a non-zero YQ value.
S

edid: Don't send non-zero YQ in AVI infoframe for HDMI 1.x sinks

Apparently some sinks look at the YQ bits even when receiving RGB,
and they get somehow confused when they see a non-zero YQ value.
So we can't just blindly follow CEA-861-F and set YQ to match the
RGB range.

Unfortunately there is no good way to tell whether the sink
designer claims to have read CEA-861-F. The CEA extension block
revision number has generally been stuck at 3 since forever,
and even a very recently manufactured sink might be based on
an old design so the manufacturing date doesn't seem like
something we can use. In lieu of better information let's
follow CEA-861-F only for HDMI 2.0 sinks, since HDMI 2.0 is
based on CEA-861-F. For HDMI 1.x sinks we'll always set YQ=0.

Change-Id: If477d06e6dbbf1ef0f84ef35abb075a37ff17be1
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

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video/drm: dw-hdmi-qp: Optimized hdmi ddc transfer process

1.Reading edid consecutively 16 bytes at a time to
reduce the time consumed.

2.Increase the number of retries on failure to ensure
success

video/drm: dw-hdmi-qp: Optimized hdmi ddc transfer process

1.Reading edid consecutively 16 bytes at a time to
reduce the time consumed.

2.Increase the number of retries on failure to ensure
successful transfer.

Change-Id: I918ed91c19101afb7b3ce72ecf5d45aa17a76382
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

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video/drm: dw-hdmi-qp: Support rk3576

Change-Id: I43dec093c33f730a76e91ebbe31a006b979d389d
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

video/drm: display: use color_encoding and color_range instead of private COLOR_SPACE

The old method to description color space and range is borrowing V4L2
defined, It's difficult to understand, so

video/drm: display: use color_encoding and color_range instead of private COLOR_SPACE

The old method to description color space and range is borrowing V4L2
defined, It's difficult to understand, so we change to DRM defined
property.

Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I7eacc60dfda912b9becae1ce026cdb82eebef7f8

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video/drm: dw-hdmi-qp: add bridge support

Change-Id: Ib45235afcaaf126b4ee7856a5b37cbbeea9517d7
Signed-off-by: Chen Shunqing <csq@rock-chips.com>

video/drm: dw-hdmi-qp: Add hdmi connector check

If hdmi bind to vp1 and it is 8K mode now, hdmi
logo display will be turned off and the hdmi logo
on flag must be cleared. Otherwise, it will cause
ke

video/drm: dw-hdmi-qp: Add hdmi connector check

If hdmi bind to vp1 and it is 8K mode now, hdmi
logo display will be turned off and the hdmi logo
on flag must be cleared. Otherwise, it will cause
kernel misjudgment.

Change-Id: I40ff7b5e4475886505f9fc3cc6f00e992cb68615
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

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video/drm: dw-hdmi-qp: When enable-gpio is not configured filter hdmi 2.1 resolution

Change-Id: I4e8347480d3fcd47be75a936145ebdaee742a6a4
Signed-off-by: Algea Cao <algea.cao@rock-chips.com>

video/drm: dw-hdmi-qp: Set flag mark uboot logo is enabled

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I1c0c55c6d41c93f1ec8995bafbd1bf383bd2fc8f

video/drm: dw-hdmi-qp: Support YUV422 color format

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I90fcbb8fd5bb46fabd919660c4cb002953a32266

video/drm: dw-hdmi-qp: support split mode

Change-Id: I36d9c340bcc25a7f0d0f84b569c39e51ce2b3b7c
Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>

video/drm: dw-hdmi-qp: Add mode valid

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I2f54ed988d251295bfd72c3831ab43165fd9a0f9

video/drm: dw-hdmi-qp: Support allm

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I09ffdb392f6ef7f4513bf720ebba8382dad23b40

video/drm: dw-hdmi-qp: Optimize HDMI enable process

1.Support phy pll clk enable/disable is separated from
phy signal output.

2.To comply with the timing requirements of the HDMI protocol,
HDMI mu

video/drm: dw-hdmi-qp: Optimize HDMI enable process

1.Support phy pll clk enable/disable is separated from
phy signal output.

2.To comply with the timing requirements of the HDMI protocol,
HDMI must be enabled in tmds mode according to the following process:

disable FRL -> enable/disable scramble —> power up phy

3.Optimize flt process

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: Ia29337d7e82dfa09cef60447911f2fd2854bc89f

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video/drm: support for multi connector

Signed-off-by: Zhang Yubing <yubing.zhang@rock-chips.com>
Change-Id: Id87d4c81e60a9f69f3fbfc05ffd67a3d42cd21a4

video/drm: dw-hdmi-qp: Send VSI once per frame

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I9626c80df27fc1d4899e382e478b1633bf06f574

video/drm: dw-hdmi-qp: Clear avmute when hdmi enable

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I7f4a0aec7f4995647c1ff17f9be9d251c2bd61b4

video/drm: dw-hdmi-qp: Support VSI packet

1.Support 3d mode.
2.Support hdmi1.4 4K resolution VIC number.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: If5c673e861c5498a1759519b8b7b

video/drm: dw-hdmi-qp: Support VSI packet

1.Support 3d mode.
2.Support hdmi1.4 4K resolution VIC number.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: If5c673e861c5498a1759519b8b7b76d98d34370f

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video/drm: dw-hdmi-qp: Configure YCC quant range and colorimetry correctly

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I9fb7143a69653ea0eb8acf6350156da077776353

video/drm: dw-hdmi-qp: Support avi version 3

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I79fdc8eb25f163f09ea2c72b4266f128b00cc331

video/drm: dw-hdmi-qp: Optimize FLT process

1.Prevents the process from getting stuck after FLT fails.
2.Prevent no signal in FRL mode.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id

video/drm: dw-hdmi-qp: Optimize FLT process

1.Prevents the process from getting stuck after FLT fails.
2.Prevent no signal in FRL mode.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I9a1d3d032027cc6d19e798dea325e9139047e07e

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video/drm: dw-hdmi-qp: Send AVI packet once per field

Increasing the sending frequency of infoframe improves
compatibility.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I5bf4b45cb

video/drm: dw-hdmi-qp: Send AVI packet once per field

Increasing the sending frequency of infoframe improves
compatibility.

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I5bf4b45cbddea02fcb3aa39262ac4ad32a3397c1

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video/drm: dw-hdmi-qp: Fix pixel clock err

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I0b622b616d75851a109fa2d693abc72d5ceb62cc

edid: Fix VIC choose err

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I2ae1967eed0fd2b1a4d25dc031623432d437e38e

video/drm: dw-hdmi-qp: Workaround for FRL mode no signal after plug

Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
Change-Id: I8be564981f25c8854c9870c8d0599ba06c88976f