| #
51fee72c |
| 20-Nov-2024 |
Finley Xiao <finley.xiao@rock-chips.com> |
video/drm: analogix_dp: Add support to enable clk and pd for mos
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Change-Id: Ib010430e1d6eebcfb7d42b365273b438f6d5df9a
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| #
9c170041 |
| 24-Feb-2025 |
Algea Cao <algea.cao@rock-chips.com> |
edid: Support hdmi2.1 extend block
Support getting HF-EEODB and HF-SCDB from edid.
Change-Id: Ib1bfe76d1e58c1346e4a0a6105a623a7ac8c8a3a Signed-off-by: Algea Cao <algea.cao@rock-chips.com>
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| #
4e1a12d5 |
| 18-Mar-2025 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: fix the disabling process of ASSR function
The DP_EDP_CONFIGURATION_SET should be configured instead of the DP_LANE_COUNT_SET register to disable ASSR.
Fixes: fc2750785b7 ("
video/drm: analogix_dp: fix the disabling process of ASSR function
The DP_EDP_CONFIGURATION_SET should be configured instead of the DP_LANE_COUNT_SET register to disable ASSR.
Fixes: fc2750785b7 ("video/drm: analogix_dp: add support for ASSR mode") Change-Id: I5406a54b4505bb8e911ed4b01f15e6318de3b0e8 Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
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| #
94834379 |
| 26-Feb-2025 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: add support forced switching to eDP mode
The bridge drivers is various, so the check of switching the eDP/DP mode may not cover all application scenario.
Therefore, we add a
video/drm: analogix_dp: add support forced switching to eDP mode
The bridge drivers is various, so the check of switching the eDP/DP mode may not cover all application scenario.
Therefore, we add a property of the eDP node to support forced switching to eDP mode, and the DT setting may be like:
&edp { edp-mode; };
Change-Id: I5586603dea6c7a0c9391ac23c5485b0c827e4794 Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
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| #
e29a4df2 |
| 26-Feb-2025 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: add support forced switching to DP mode
Some bridges support to convert DP into display interfaces that support the panel, such as RGB, LVDS, MIPI and so on. For instance, th
video/drm: analogix_dp: add support forced switching to DP mode
Some bridges support to convert DP into display interfaces that support the panel, such as RGB, LVDS, MIPI and so on. For instance, the LT7211B and LT7911D from Lontium can offer this functionality.
Therefore, we add a property of the eDP node to support forced switching to DP mode, and the DT setting may be like:
&edp0 { dp-mode; };
Change-Id: Ic65fbaf9dfa567bfd74678624e503e9aaf42f7dc Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
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| #
6c0d4eb6 |
| 26-Feb-2025 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: support for switching the eDP/DP mode
Since the Analogix IP can support both eDP v1.3 and DP v1.2, it is sensible to first check whether the last bridge is connected to a pan
video/drm: analogix_dp: support for switching the eDP/DP mode
Since the Analogix IP can support both eDP v1.3 and DP v1.2, it is sensible to first check whether the last bridge is connected to a panel in order to determine and pass on the eDP/DP submodes to the PHY, which can help separate the eDP/DP configurations in the PHY driver.
Change-Id: I802b3e2052a9869412d7b9e70e96fe8da0203b9f Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
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| #
32035f4b |
| 24-Feb-2025 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: add flag support_dp_mode to check if the platform supports DP mode
For RK3588/RK3576, eDP IP can support not only eDP v1.3 but also DP v1.2, which has the different PHY confi
video/drm: analogix_dp: add flag support_dp_mode to check if the platform supports DP mode
For RK3588/RK3576, eDP IP can support not only eDP v1.3 but also DP v1.2, which has the different PHY configurations to separate eDP and DP mode.
Change-Id: Idc14d3ee36bdaceab4e763c80594fee836c5ca7d Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
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| #
eb6d4c72 |
| 21-Feb-2025 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: use exist drm_do_get_edid() to get edid
Change-Id: I1930242c4fee721447acfc234e30145ba9f83031 Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
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| #
fc275078 |
| 10-Feb-2025 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: add support for ASSR mode
According to the eDP v1.3 chapter 3.6 Table 3-15, Alternative Scramble Seed Reset(ASSR) is a recommended way for eDP Sink devices to support Display
video/drm: analogix_dp: add support for ASSR mode
According to the eDP v1.3 chapter 3.6 Table 3-15, Alternative Scramble Seed Reset(ASSR) is a recommended way for eDP Sink devices to support Display Authentication and Content Protection as Method 3a, while Method 1 HDCP is normally not expected in an eDP Sink device.
In addition, the ASSR support capability should be the bit 0 of DPCD register 0000Dh according to the eDP v1.4 'Revision History' table 2:
...... Table 3-4: Corrected reference to DPCD Address 0000Dh, bit 0 (was bit 4) ......
Change-Id: I311a8ed0baae37047e84bdc697842c5bb3fcd6fb Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
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| #
1bf3c971 |
| 10-Feb-2025 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: use existing drm dp helper function to check enhanced frame support
The analogix_dp_is_enhanced_mode_available() can be replaced by drm helper function drm_dp_enhanced_frame_
video/drm: analogix_dp: use existing drm dp helper function to check enhanced frame support
The analogix_dp_is_enhanced_mode_available() can be replaced by drm helper function drm_dp_enhanced_frame_cap().
Change-Id: I8bea4a78955ff064e063a4bad84efe6e508fb637 Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
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| #
d67c1260 |
| 18-Nov-2024 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: add support for color format yuv444/yuv422
The detailed changes as follows: 1.Add flag max_bpc and format_yuv to check whether the platform support 10 bit per component and
video/drm: analogix_dp: add support for color format yuv444/yuv422
The detailed changes as follows: 1.Add flag max_bpc and format_yuv to check whether the platform support 10 bit per component and YUV444/YUV422. 2.Add exact bpp related to output format in bandwidth calculation, which is fixed to 24 before the patch. 3.Add .get_timing() of rockchip_connector_funcs support to meet the needs of epd2dp application cases.
Related kernel commit: a7620fa846c2 ("drm/rockchip: analogix_dp: add support for color format yuv444/yuv422")
Change-Id: I6c8e8cfbbc653a6e4ab86d39fb974657e917d037 Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
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| #
ea286ea2 |
| 18-Nov-2024 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: Fix incorrect usage of enhanced mode
Enhanced mode is required by the eDP 1.2 specification, and not doing it early could result in a period of time where we have a link tran
video/drm: analogix_dp: Fix incorrect usage of enhanced mode
Enhanced mode is required by the eDP 1.2 specification, and not doing it early could result in a period of time where we have a link transmitting idle packets without it. Since there is no reason to disable it, we just enable it at the beginning of link training and then keep it on all the time.
Related kernel commit: 1932250df1f0 ("drm/bridge: analogix_dp: Fix incorrect usage of enhanced mode")
Fixes: 186f85721af ("drm/rockhcip: add drm rockchip display support") Change-Id: I32be24ae8561b79dce549e1fd55af9bd0341de2e Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
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| #
06b1b28f |
| 18-Nov-2024 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: Compliant with eDP receiver enhanced frame capability
As the Table 3-4 in eDP v1.2 spec: DPCD 0000Dh: Bit 1 = FRAMING_CHANGE_CAPABLE A setting of 1 indicates that this is an
video/drm: analogix_dp: Compliant with eDP receiver enhanced frame capability
As the Table 3-4 in eDP v1.2 spec: DPCD 0000Dh: Bit 1 = FRAMING_CHANGE_CAPABLE A setting of 1 indicates that this is an eDP device that uses only Enhanced Framing, independently of the setting by the source of ENHANCED_FRAME_EN
And as the Table 3-3 in eDP v1.4 spec: DPCD 0000Dh: Bit 1 = RESERVED for eDP New to eDP v1.4.(Read all 0s)
Related kernel commit: 5d2f3f959e5d ("drm/bridge: analogix_dp: Compliant with eDP receiver enhanced frame capability")
Change-Id: I3c2d4067c3a0378f2ad2b4bf393c369bf8fe4b81 Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
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| #
2fcb4783 |
| 18-Nov-2024 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: read/write DPCD through drm_dp_aux
Sync the functions of DPCD read/write with Kernel:
analogix_dp_write_byte_to_dpcd() -> drm_dp_dpcd_writeb() analogix_dp_read_byte_from_dpc
video/drm: analogix_dp: read/write DPCD through drm_dp_aux
Sync the functions of DPCD read/write with Kernel:
analogix_dp_write_byte_to_dpcd() -> drm_dp_dpcd_writeb() analogix_dp_read_byte_from_dpcd() -> drm_dp_dpcd_readb() analogix_dp_write_bytes_to_dpcd() -> drm_dp_dpcd_write() analogix_dp_read_bytes_from_dpcd() -> drm_dp_dpcd_read()
In addition, the older functions may not have the return value check. So the necessary return value check have been added in the patch, which is also synchronized with Kernel.
With the patch, the analogix_dp driver will be more maintainable and readable.
Change-Id: Ic2b7d6d9ab32ecec0c5bb6de09082c536cae1a41 Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
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| #
58df3976 |
| 18-Nov-2024 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: register drm_dp_aux and support the transfer function of aux
Change-Id: Iccb0a170d73fe6e7960ca759015b38bd5c9d70da Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
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| #
6e378f44 |
| 21-Dec-2023 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: each edp needs half horizontal timing in dual channel mode
In dual channel mode, the display timings from dts or edid are not halved, compared with split mode, and both of co
video/drm: analogix_dp: each edp needs half horizontal timing in dual channel mode
In dual channel mode, the display timings from dts or edid are not halved, compared with split mode, and both of connectors need the half of actual display timings.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: Idd6e37a5bf310c4159c3e99071ba478b25ad6a7d
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| #
ead74bb6 |
| 29-May-2024 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: add support for rate R216/R243/R324/R432
R216/R243/R324/R432 are the new recommended link rates in eDP v1.4, which may be read from DPCD SUPPORTED_LINK_RATES (0x00010h throug
video/drm: analogix_dp: add support for rate R216/R243/R324/R432
R216/R243/R324/R432 are the new recommended link rates in eDP v1.4, which may be read from DPCD SUPPORTED_LINK_RATES (0x00010h through 0x0001fh). And set the link rate by DPCD LINK_BW_SET(0x00100h).
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I68ed7020c87e9e4453128890e3ca42b875455b80
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| #
7477c1ef |
| 29-May-2024 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: add support to parse link rate for eDP v1.4
As Table 4-23 in eDP v1.4 spec, the link rate can be read from SUPPORTED_LINK_RATES(0x00010h through 0x0001fh), which is required
video/drm: analogix_dp: add support to parse link rate for eDP v1.4
As Table 4-23 in eDP v1.4 spec, the link rate can be read from SUPPORTED_LINK_RATES(0x00010h through 0x0001fh), which is required for sink devices.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: If747462b9c4b37ee643e9ca08e4daf397cbdce9d
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| #
1ee9f77b |
| 09-Apr-2024 |
Guochun Huang <hero.huang@rock-chips.com> |
video/drm: display: fix Condition of CDR fail
In DP spec 1.3, Condition of CR fail are outlined in section 3.5.1.2.2.1, figure 3-20:
1. Maximum Voltage Swing reached 2. Same Voltage five times
The
video/drm: display: fix Condition of CDR fail
In DP spec 1.3, Condition of CR fail are outlined in section 3.5.1.2.2.1, figure 3-20:
1. Maximum Voltage Swing reached 2. Same Voltage five times
The following conditions have been optimized: 1. Training of CDR still failed while maximum voltage swing has been applied and configured 2.Removed the redundant judgment for the maximum pre-emphasis level reached
Change-Id: I560cbe9da273bfc1e532d0d8029d793a23938bc5 Signed-off-by: Guochun Huang <hero.huang@rock-chips.com>
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| #
df0a5c43 |
| 06-Feb-2024 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: display: use color_encoding and color_range instead of private COLOR_SPACE
The old method to description color space and range is borrowing V4L2 defined, It's difficult to understand, so
video/drm: display: use color_encoding and color_range instead of private COLOR_SPACE
The old method to description color space and range is borrowing V4L2 defined, It's difficult to understand, so we change to DRM defined property.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I7eacc60dfda912b9becae1ce026cdb82eebef7f8
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| #
46d49f07 |
| 26-Jan-2024 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: add support for rk3576
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: Ieceb5038f1e94a2a4ea40921a1266d4d4d28847e
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| #
f38653b8 |
| 18-Dec-2023 |
Damon Ding <damon.ding@rock-chips.com> |
video/drm: analogix_dp: add add mode_valid func support
The edp controller can not support display timings whose front porch or back porch is 0.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com
video/drm: analogix_dp: add add mode_valid func support
The edp controller can not support display timings whose front porch or back porch is 0.
Signed-off-by: Damon Ding <damon.ding@rock-chips.com> Change-Id: I67894af8096f1f90c5556cea64feefc7d3162585
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| #
35c48984 |
| 12-Apr-2023 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: analogix_dp: parse link-frequencies property of output endpoint
Add capability to parse and retrieve max DP link supported rate from link-frequencies property of output endpoint.
Change-
video/drm: analogix_dp: parse link-frequencies property of output endpoint
Add capability to parse and retrieve max DP link supported rate from link-frequencies property of output endpoint.
Change-Id: I8f25c9601cb579c47b8d8909ff4ef7bdffe5ddff Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
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| #
e417664a |
| 25-Feb-2023 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: analogix_dp: Support HBR2 for RK3399
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com> Change-Id: I9084623ddaa5e022edd83c70d073e6ecd0d72743
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| #
ae5256b5 |
| 10-Oct-2022 |
Wyon Bi <bivvy.bi@rock-chips.com> |
video/drm: analogix_dp: Fix stream valid control
Fixes: e9cac7f1fea9 ("video/drm: analogix_dp: Use video format information from register") Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com> Change-Id
video/drm: analogix_dp: Fix stream valid control
Fixes: e9cac7f1fea9 ("video/drm: analogix_dp: Use video format information from register") Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com> Change-Id: I94c32572bc8b58cc5902a1ada23f45f300d06ca5
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