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Searched refs:dbi_base (Results 1 – 3 of 3) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/mach-rockchip/
H A Dspl_pcie_ep_boot.c169 static int rockchip_pcie_ep_set_bar_flag(void *dbi_base, u32 barno, int flags) in rockchip_pcie_ep_set_bar_flag() argument
177 writel(0, dbi_base + reg + 0x100000 + 4); in rockchip_pcie_ep_set_bar_flag()
179 writel(flags, dbi_base + reg); in rockchip_pcie_ep_set_bar_flag()
181 writel(0, dbi_base + reg + 4); in rockchip_pcie_ep_set_bar_flag()
186 static void pcie_bar_init(void *dbi_base) in pcie_bar_init() argument
191 writel(0, dbi_base + 0x10); in pcie_bar_init()
192 writel(0, dbi_base + 0x14); in pcie_bar_init()
193 writel(0, dbi_base + 0x18); in pcie_bar_init()
194 writel(0, dbi_base + 0x1c); in pcie_bar_init()
195 writel(0, dbi_base + 0x20); in pcie_bar_init()
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/rk3399_rockchip-uboot/drivers/pci/
H A Dpcie_imx.c99 static int pcie_phy_poll_ack(void __iomem *dbi_base, int exp_val) in pcie_phy_poll_ack() argument
106 val = readl(dbi_base + PCIE_PHY_STAT); in pcie_phy_poll_ack()
119 static int pcie_phy_wait_ack(void __iomem *dbi_base, int addr) in pcie_phy_wait_ack() argument
125 writel(val, dbi_base + PCIE_PHY_CTRL); in pcie_phy_wait_ack()
128 writel(val, dbi_base + PCIE_PHY_CTRL); in pcie_phy_wait_ack()
130 ret = pcie_phy_poll_ack(dbi_base, 1); in pcie_phy_wait_ack()
135 writel(val, dbi_base + PCIE_PHY_CTRL); in pcie_phy_wait_ack()
137 ret = pcie_phy_poll_ack(dbi_base, 0); in pcie_phy_wait_ack()
145 static int pcie_phy_read(void __iomem *dbi_base, int addr , int *data) in pcie_phy_read() argument
150 ret = pcie_phy_wait_ack(dbi_base, addr); in pcie_phy_read()
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H A Dpcie_dw_rockchip.c62 void *dbi_base; member
261 header = readl(rk_pcie->dbi_base + pos); in rk_pci_find_ext_capability()
278 header = readl(rk_pcie->dbi_base + pos); in rk_pci_find_ext_capability()
288 return (readl(rk_pcie->dbi_base + PCIE_LINK_STATUS_REG) & in rk_pcie_get_link_speed()
294 return (readl(rk_pcie->dbi_base + PCIE_LINK_STATUS_REG) & in rk_pcie_get_link_width()
302 void __iomem *base = rk_pcie->dbi_base; in rk_pcie_writel_ob_unroll()
310 void __iomem *base = rk_pcie->dbi_base; in rk_pcie_readl_ob_unroll()
319 val = readl(rk_pcie->dbi_base + PCIE_MISC_CONTROL_1_OFF); in rk_pcie_dbi_write_enable()
325 writel(val, rk_pcie->dbi_base + PCIE_MISC_CONTROL_1_OFF); in rk_pcie_dbi_write_enable()
336 rk_pcie->dbi_base + PCI_BASE_ADDRESS_0); in rk_pcie_setup_host()
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