| #
867b5b94 |
| 06-Aug-2024 |
Jon Lin <jon.lin@rock-chips.com> |
rockchip: pcie-ep-boot: Change phy_mode when controller power_up reset assert
Change-Id: I4a550b94b6128d9131762bfece447d4da9a93099
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
fe857eea |
| 17-May-2024 |
Jon Lin <jon.lin@rock-chips.com> |
rockchip: pcie-ep-boot: Support setting rk3588 phy mode
Change-Id: I17635b3fc5cf88f7752642e0218beff38009f152
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|
| #
197c7fbf |
| 09-May-2024 |
Jon Lin <jon.lin@rock-chips.com> |
rockchip: pcie-ep-boot: Fix rk3588 secure master configuration
Change-Id: I74e8f7e718b3fc44c28055bb8cd7f43df3fab0a0
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|
| #
54afed56 |
| 31-Mar-2024 |
Jon Lin <jon.lin@rock-chips.com> |
rockchip: pcie-ep-boot: Update EP configuration
1.Remove redundancy close bar3 code
2.Add phy linkup jitter detect
3.Add wait statble
Change-Id: I93a1b8421d566d9871aeac3784688cbd9cf5b4de
Signed-off
rockchip: pcie-ep-boot: Update EP configuration
1.Remove redundancy close bar3 code
2.Add phy linkup jitter detect
3.Add wait statble
Change-Id: I93a1b8421d566d9871aeac3784688cbd9cf5b4de
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
show more ...
|
| #
11badaec |
| 06-Dec-2023 |
Jon Lin <jon.lin@rock-chips.com> |
rockchip: pcie-ep-boot: Fix resize bar capability for EP
Avoid RC attempting to modify EP bar strategy.
Change-Id: I8c9b4ea4c39eb72045a80b9a4105372d008beb7c
Signed-off-by: Jon Lin <jon.lin@rock-chi
rockchip: pcie-ep-boot: Fix resize bar capability for EP
Avoid RC attempting to modify EP bar strategy.
Change-Id: I8c9b4ea4c39eb72045a80b9a4105372d008beb7c
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
show more ...
|
| #
b7b35050 |
| 09-Nov-2023 |
Jon Lin <jon.lin@rock-chips.com> |
rockchip: pcie-ep-boot: Check the link host reset status before initialization
Change-Id: Ibe8980257c11035b1a498f295a81e8949c7e7031
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|
| #
8269535e |
| 18-Oct-2023 |
Xiao Ya peng <yp.xiao@rock-chips.com> |
rockchip: pcie-ep-boot: Fix build error
Fixes: d0abf46d4e0 ("rockchip: pcie-ep-boot: Reset when phy locked failed")
Signed-off-by: Xiao Ya peng <yp.xiao@rock-chips.com>
Change-Id: Ib3a9f936b8d909c62
rockchip: pcie-ep-boot: Fix build error
Fixes: d0abf46d4e0 ("rockchip: pcie-ep-boot: Reset when phy locked failed")
Signed-off-by: Xiao Ya peng <yp.xiao@rock-chips.com>
Change-Id: Ib3a9f936b8d909c62a80f7267c8cfc11060cd5b8
show more ...
|
| #
d0abf46d |
| 31-Jul-2023 |
Jon Lin <jon.lin@rock-chips.com> |
rockchip: pcie-ep-boot: Reset when phy locked failed
Change-Id: I932874b517fb09d77740a9f7fb173685cfdb387a
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|
| #
a74e90ee |
| 12-Sep-2023 |
Jon Lin <jon.lin@rock-chips.com> |
rockchip: pcie-ep-boot: Set PCIe EP info if the link is already linked
1.Set PCIe EP info if the link is already linked
2.Disable ASPM
Change-Id: I96c91afca9ec432df4a58605596c71eb2448e161
Signed-of
rockchip: pcie-ep-boot: Set PCIe EP info if the link is already linked
1.Set PCIe EP info if the link is already linked
2.Disable ASPM
Change-Id: I96c91afca9ec432df4a58605596c71eb2448e161
Signed-off-by: Xiao Ya peng <yp.xiao@rock-chips.com>
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
show more ...
|
| #
7cee23c8 |
| 04-Jul-2023 |
Jon Lin <jon.lin@rock-chips.com> |
rockchip: pcie-ep-boot: Support RK3568
Change-Id: If91321149fb20188c57675c6ceb5fd7ddc800847
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
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| #
2f33b98f |
| 04-Jul-2023 |
Jon Lin <jon.lin@rock-chips.com> |
rockchip: pcie-ep-boot: Support set lanes and max speed
Change-Id: Ibc34445664b842fcc328a70a7c440a2e6b7675e4
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>
|
| #
26d59203 |
| 06-Jun-2023 |
Xiao Ya peng <yp.xiao@rock-chips.com> |
rockchip: pcie-ep-boot: fix dcache flush for update devmode
Signed-off-by: Xiao Ya peng <yp.xiao@rock-chips.com>
Change-Id: I0151a59ccb120745b35f66b797b9ebae3351bf29
|
| #
6fa0195b |
| 19-May-2023 |
Xiao Ya peng <yp.xiao@rock-chips.com> |
rockchip: pcie-ep-boot: Update pcie ep status
Update status for pcie boot:
INIT->LINKRDY->LINKUP->FWDLRDY->FWDLDONE
Signed-off-by: Xiao Ya peng <yp.xiao@rock-chips.com>
Change-Id: I29b2da872bb5d05e
rockchip: pcie-ep-boot: Update pcie ep status
Update status for pcie boot:
INIT->LINKRDY->LINKUP->FWDLRDY->FWDLDONE
Signed-off-by: Xiao Ya peng <yp.xiao@rock-chips.com>
Change-Id: I29b2da872bb5d05ea80e4a083cf2568a86f0f654
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
show more ...
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| #
4c8e468b |
| 23-Sep-2022 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: pcie-ep-boot: Add pcie ep boot function
This is test on rk3588 evb4/evb4v20.
Steps:
1. Init PCIe EP with:
BAR0: 32bit nonprefetchable, control area, at 0x3c000000
BAR2: 64bit prefetchable,
rockchip: pcie-ep-boot: Add pcie ep boot function
This is test on rk3588 evb4/evb4v20.
Steps:
1. Init PCIe EP with:
BAR0: 32bit nonprefetchable, control area, at 0x3c000000
BAR2: 64bit prefetchable, data area, at CONFIG_SPL_LOAD_FIT_ADDRESS
BAR4: EP wired register
2. Waiting for Linkup;
3. Wating for firmware and RUN command;
4. boot with RAM partition.
Test with RC function driver pcie-rkep.c in host side.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Change-Id: I91e8a3e4159668d57c806663ad4faab93585e6d7
show more ...
|