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Searched refs:ctrl_base (Results 1 – 12 of 12) sorted by relevance

/rk3399_rockchip-uboot/drivers/pci/
H A Dpcie_dw_mvebu.c110 void *ctrl_base; member
152 writel(0, pcie->ctrl_base + PCIE_ATU_VIEWPORT); in set_cfg_address()
156 writel(PCIE_ATU_TYPE_CFG0, pcie->ctrl_base + PCIE_ATU_CR1); in set_cfg_address()
159 writel(PCIE_ATU_TYPE_CFG1, pcie->ctrl_base + PCIE_ATU_CR1); in set_cfg_address()
163 va_address = (uintptr_t)pcie->ctrl_base; in set_cfg_address()
165 writel(d << 8, pcie->ctrl_base + PCIE_ATU_LOWER_TARGET); in set_cfg_address()
403 writel(0, pcie->ctrl_base + PCIE_ATU_VIEWPORT); in pcie_dw_regions_setup()
405 writel((u32)(uintptr_t)pcie->cfg_base, pcie->ctrl_base in pcie_dw_regions_setup()
407 writel(0, pcie->ctrl_base + PCIE_ATU_UPPER_BASE); in pcie_dw_regions_setup()
409 pcie->ctrl_base + PCIE_ATU_LIMIT); in pcie_dw_regions_setup()
[all …]
/rk3399_rockchip-uboot/board/compulab/common/
H A Domap3_smc911x.c33 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; in cl_omap3_smc911x_setup_net_chip_gmpc() local
39 writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); in cl_omap3_smc911x_setup_net_chip_gmpc()
42 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); in cl_omap3_smc911x_setup_net_chip_gmpc()
45 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, in cl_omap3_smc911x_setup_net_chip_gmpc()
46 &ctrl_base->gpmc_nadv_ale); in cl_omap3_smc911x_setup_net_chip_gmpc()
/rk3399_rockchip-uboot/board/isee/igep00x0/
H A Digep00x0.c107 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; in setup_net_chip() local
121 writew(readw(&ctrl_base->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); in setup_net_chip()
123 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); in setup_net_chip()
125 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, in setup_net_chip()
126 &ctrl_base->gpmc_nadv_ale); in setup_net_chip()
/rk3399_rockchip-uboot/board/ti/evm/
H A Devm.c249 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; in setup_net_chip() local
261 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); in setup_net_chip()
263 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); in setup_net_chip()
265 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, in setup_net_chip()
266 &ctrl_base->gpmc_nadv_ale); in setup_net_chip()
/rk3399_rockchip-uboot/board/overo/
H A Dovero.c318 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; in setup_net_chip() local
321 writew(readw(&ctrl_base ->gpmc_nwe) | 0x0E00, &ctrl_base->gpmc_nwe); in setup_net_chip()
323 writew(readw(&ctrl_base->gpmc_noe) | 0x0E00, &ctrl_base->gpmc_noe); in setup_net_chip()
325 writew(readw(&ctrl_base->gpmc_nadv_ale) | 0x0E00, in setup_net_chip()
326 &ctrl_base->gpmc_nadv_ale); in setup_net_chip()
/rk3399_rockchip-uboot/arch/arm/mach-omap2/omap3/
H A Dboot.c48 struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; in omap_sys_boot_device() local
52 sys_boot = readl(&ctrl_base->status) & ((1 << 5) - 1); in omap_sys_boot_device()
H A Dsys_info.c26 static struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE; variable
61 return readl(&ctrl_base->ctrl_omap_stat); in get_cpu_type()
237 return (readl(&ctrl_base->status) & SYSBOOT_MASK); in get_boot_type()
/rk3399_rockchip-uboot/drivers/usb/musb-new/
H A Dda8xx.c66 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_interrupt()
153 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_init()
195 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_enable()
216 void __iomem *reg_base = musb->ctrl_base; in da8xx_musb_disable()
H A Dmusb_dsps.c159 void __iomem *reg_base = musb->ctrl_base; in dsps_musb_enable()
189 void __iomem *reg_base = musb->ctrl_base; in dsps_musb_disable()
236 dsps_writel(musb->ctrl_base, wrp->coreintr_set, in otg_timer()
296 void __iomem *reg_base = musb->ctrl_base; in dsps_interrupt()
423 void __iomem *reg_base = musb->ctrl_base; in dsps_musb_init()
462 dsps_writel(musb->ctrl_base, wrp->phy_utmi, val); in dsps_musb_init()
H A Dam35x.c95 void __iomem *reg_base = musb->ctrl_base; in am35x_musb_enable()
119 void __iomem *reg_base = musb->ctrl_base; in am35x_musb_disable()
172 musb_writel(musb->ctrl_base, CORE_INTR_SRC_SET_REG, in otg_timer()
227 void __iomem *reg_base = musb->ctrl_base; in am35x_musb_interrupt()
382 void __iomem *reg_base = musb->ctrl_base; in am35x_musb_init()
H A Dmusb_core.h352 void __iomem *ctrl_base; member
H A Dmusb_core.c1859 musb->ctrl_base = mbase; in allocate_instance()
2203 void __iomem *ctrl_base = musb->ctrl_base; in musb_remove() local
2214 iounmap(ctrl_base); in musb_remove()