1*983e3700STom Rini /*
2*983e3700STom Rini * OMAP3 boot
3*983e3700STom Rini *
4*983e3700STom Rini * Copyright (C) 2015 Paul Kocialkowski <contact@paulk.fr>
5*983e3700STom Rini *
6*983e3700STom Rini * SPDX-License-Identifier: GPL-2.0+
7*983e3700STom Rini */
8*983e3700STom Rini
9*983e3700STom Rini #include <common.h>
10*983e3700STom Rini #include <asm/io.h>
11*983e3700STom Rini #include <asm/arch/sys_proto.h>
12*983e3700STom Rini #include <spl.h>
13*983e3700STom Rini
14*983e3700STom Rini static u32 boot_devices[] = {
15*983e3700STom Rini BOOT_DEVICE_ONENAND,
16*983e3700STom Rini BOOT_DEVICE_NAND,
17*983e3700STom Rini BOOT_DEVICE_ONENAND,
18*983e3700STom Rini BOOT_DEVICE_MMC2,
19*983e3700STom Rini BOOT_DEVICE_ONENAND,
20*983e3700STom Rini BOOT_DEVICE_MMC2,
21*983e3700STom Rini BOOT_DEVICE_MMC1,
22*983e3700STom Rini BOOT_DEVICE_XIP,
23*983e3700STom Rini BOOT_DEVICE_XIPWAIT,
24*983e3700STom Rini BOOT_DEVICE_MMC2,
25*983e3700STom Rini BOOT_DEVICE_XIP,
26*983e3700STom Rini BOOT_DEVICE_XIPWAIT,
27*983e3700STom Rini BOOT_DEVICE_NAND,
28*983e3700STom Rini BOOT_DEVICE_XIP,
29*983e3700STom Rini BOOT_DEVICE_XIPWAIT,
30*983e3700STom Rini BOOT_DEVICE_NAND,
31*983e3700STom Rini BOOT_DEVICE_ONENAND,
32*983e3700STom Rini BOOT_DEVICE_MMC2,
33*983e3700STom Rini BOOT_DEVICE_MMC1,
34*983e3700STom Rini BOOT_DEVICE_XIP,
35*983e3700STom Rini BOOT_DEVICE_XIPWAIT,
36*983e3700STom Rini BOOT_DEVICE_NAND,
37*983e3700STom Rini BOOT_DEVICE_ONENAND,
38*983e3700STom Rini BOOT_DEVICE_MMC2,
39*983e3700STom Rini BOOT_DEVICE_MMC1,
40*983e3700STom Rini BOOT_DEVICE_XIP,
41*983e3700STom Rini BOOT_DEVICE_XIPWAIT,
42*983e3700STom Rini BOOT_DEVICE_NAND,
43*983e3700STom Rini BOOT_DEVICE_MMC2_2,
44*983e3700STom Rini };
45*983e3700STom Rini
omap_sys_boot_device(void)46*983e3700STom Rini u32 omap_sys_boot_device(void)
47*983e3700STom Rini {
48*983e3700STom Rini struct ctrl *ctrl_base = (struct ctrl *)OMAP34XX_CTRL_BASE;
49*983e3700STom Rini u32 sys_boot;
50*983e3700STom Rini
51*983e3700STom Rini /* Grab the first 5 bits of the status register for SYS_BOOT. */
52*983e3700STom Rini sys_boot = readl(&ctrl_base->status) & ((1 << 5) - 1);
53*983e3700STom Rini
54*983e3700STom Rini if (sys_boot >= (sizeof(boot_devices) / sizeof(u32)))
55*983e3700STom Rini return BOOT_DEVICE_NONE;
56*983e3700STom Rini
57*983e3700STom Rini return boot_devices[sys_boot];
58*983e3700STom Rini }
59*983e3700STom Rini
omap_reboot_mode(char * mode,unsigned int length)60*983e3700STom Rini int omap_reboot_mode(char *mode, unsigned int length)
61*983e3700STom Rini {
62*983e3700STom Rini u32 reboot_mode;
63*983e3700STom Rini char c;
64*983e3700STom Rini
65*983e3700STom Rini if (length < 2)
66*983e3700STom Rini return -1;
67*983e3700STom Rini
68*983e3700STom Rini reboot_mode = readl((u32 *)(OMAP34XX_SCRATCHPAD +
69*983e3700STom Rini OMAP_REBOOT_REASON_OFFSET));
70*983e3700STom Rini
71*983e3700STom Rini c = (reboot_mode >> 24) & 0xff;
72*983e3700STom Rini if (c != 'B')
73*983e3700STom Rini return -1;
74*983e3700STom Rini
75*983e3700STom Rini c = (reboot_mode >> 16) & 0xff;
76*983e3700STom Rini if (c != 'M')
77*983e3700STom Rini return -1;
78*983e3700STom Rini
79*983e3700STom Rini c = reboot_mode & 0xff;
80*983e3700STom Rini
81*983e3700STom Rini mode[0] = c;
82*983e3700STom Rini mode[1] = '\0';
83*983e3700STom Rini
84*983e3700STom Rini return 0;
85*983e3700STom Rini }
86*983e3700STom Rini
omap_reboot_mode_clear(void)87*983e3700STom Rini int omap_reboot_mode_clear(void)
88*983e3700STom Rini {
89*983e3700STom Rini writel(0, (u32 *)(OMAP34XX_SCRATCHPAD + OMAP_REBOOT_REASON_OFFSET));
90*983e3700STom Rini
91*983e3700STom Rini return 0;
92*983e3700STom Rini }
93*983e3700STom Rini
omap_reboot_mode_store(char * mode)94*983e3700STom Rini int omap_reboot_mode_store(char *mode)
95*983e3700STom Rini {
96*983e3700STom Rini u32 reboot_mode;
97*983e3700STom Rini
98*983e3700STom Rini reboot_mode = 'B' << 24 | 'M' << 16 | mode[0];
99*983e3700STom Rini
100*983e3700STom Rini writel(reboot_mode, (u32 *)(OMAP34XX_SCRATCHPAD +
101*983e3700STom Rini OMAP_REBOOT_REASON_OFFSET));
102*983e3700STom Rini
103*983e3700STom Rini return 0;
104*983e3700STom Rini }
105