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Searched refs:csr (Results 1 – 25 of 36) sorted by relevance

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/rk3399_rockchip-uboot/drivers/usb/musb/
H A Dmusb_hcd.c41 u16 csr; in write_toggle() local
44 csr = readw(&musbr->txcsr); in write_toggle()
46 if (csr & MUSB_TXCSR_MODE) in write_toggle()
47 csr = MUSB_TXCSR_CLRDATATOG; in write_toggle()
49 csr = 0; in write_toggle()
50 writew(csr, &musbr->txcsr); in write_toggle()
52 csr |= MUSB_TXCSR_H_WR_DATATOGGLE; in write_toggle()
53 writew(csr, &musbr->txcsr); in write_toggle()
54 csr |= (toggle << MUSB_TXCSR_H_DATATOGGLE_SHIFT); in write_toggle()
55 writew(csr, &musbr->txcsr); in write_toggle()
[all …]
H A Dmusb_core.c68 u16 csr; in musb_configure_ep() local
83 csr = readw(&musbr->txcsr); in musb_configure_ep()
86 writew(csr | MUSB_TXCSR_CLRDATATOG, &musbr->txcsr); in musb_configure_ep()
89 if (csr & MUSB_TXCSR_TXPKTRDY) in musb_configure_ep()
90 writew(csr | MUSB_TXCSR_FLUSHFIFO, in musb_configure_ep()
96 csr = readw(&musbr->rxcsr); in musb_configure_ep()
99 writew(csr | MUSB_RXCSR_CLRDATATOG, &musbr->rxcsr); in musb_configure_ep()
102 if (csr & MUSB_RXCSR_RXPKTRDY) in musb_configure_ep()
103 writew(csr | MUSB_RXCSR_FLUSHFIFO, in musb_configure_ep()
/rk3399_rockchip-uboot/drivers/usb/musb-new/
H A Dmusb_gadget.c320 u16 fifo_count = 0, csr; in txstate() local
339 csr = musb_readw(epio, MUSB_TXCSR); in txstate()
345 if (csr & MUSB_TXCSR_TXPKTRDY) { in txstate()
347 musb_ep->end_point.name, csr); in txstate()
351 if (csr & MUSB_TXCSR_P_SENDSTALL) { in txstate()
353 musb_ep->end_point.name, csr); in txstate()
359 csr); in txstate()
393 csr &= ~(MUSB_TXCSR_AUTOSET in txstate()
395 musb_writew(epio, MUSB_TXCSR, csr in txstate()
397 csr &= ~MUSB_TXCSR_DMAMODE; in txstate()
[all …]
H A Dmusb_gadget_ep0.c246 u16 csr; in service_zero_data_request() local
269 csr = musb_readw(regs, MUSB_TXCSR); in service_zero_data_request()
270 csr |= MUSB_TXCSR_CLRDATATOG | in service_zero_data_request()
272 csr &= ~(MUSB_TXCSR_P_SENDSTALL | in service_zero_data_request()
275 musb_writew(regs, MUSB_TXCSR, csr); in service_zero_data_request()
277 csr = musb_readw(regs, MUSB_RXCSR); in service_zero_data_request()
278 csr |= MUSB_RXCSR_CLRDATATOG | in service_zero_data_request()
280 csr &= ~(MUSB_RXCSR_P_SENDSTALL | in service_zero_data_request()
282 musb_writew(regs, MUSB_RXCSR, csr); in service_zero_data_request()
410 u16 csr; in service_zero_data_request() local
[all …]
H A Dmusb_host.c94 u16 csr; in musb_h_tx_flush_fifo() local
98 csr = musb_readw(epio, MUSB_TXCSR); in musb_h_tx_flush_fifo()
99 while (csr & MUSB_TXCSR_FIFONOTEMPTY) { in musb_h_tx_flush_fifo()
100 if (csr != lastcsr) in musb_h_tx_flush_fifo()
101 dev_dbg(musb->controller, "Host TX FIFONOTEMPTY csr: %02x\n", csr); in musb_h_tx_flush_fifo()
102 lastcsr = csr; in musb_h_tx_flush_fifo()
103 csr |= MUSB_TXCSR_FLUSHFIFO; in musb_h_tx_flush_fifo()
104 musb_writew(epio, MUSB_TXCSR, csr); in musb_h_tx_flush_fifo()
105 csr = musb_readw(epio, MUSB_TXCSR); in musb_h_tx_flush_fifo()
108 ep->epnum, csr)) in musb_h_tx_flush_fifo()
[all …]
/rk3399_rockchip-uboot/drivers/usb/gadget/
H A Dat91_udc.c126 u32 csr; in read_fifo() local
138 csr = __raw_readl(creg); in read_fifo()
139 if ((csr & RX_DATA_READY) == 0) in read_fifo()
142 count = (csr & AT91_UDP_RXBYTECNT) >> 16; in read_fifo()
153 csr |= CLR_FX; in read_fifo()
156 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); in read_fifo()
159 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK1); in read_fifo()
163 csr &= ~(SET_FX | AT91_UDP_RX_DATA_BK0); in read_fifo()
164 __raw_writel(csr, creg); in read_fifo()
186 csr = __raw_readl(creg); in read_fifo()
[all …]
/rk3399_rockchip-uboot/drivers/serial/
H A Datmel_usart.c52 if (!(readl(&usart->csr) & USART3_BIT(TXEMPTY))) in atmel_serial_init_internal()
95 while (!(readl(&usart->csr) & USART3_BIT(TXRDY))); in atmel_serial_putc()
103 while (!(readl(&usart->csr) & USART3_BIT(RXRDY))) in atmel_serial_getc()
111 return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0; in atmel_serial_tstc()
186 if (!(readl(&priv->usart->csr) & USART3_BIT(RXRDY))) in atmel_serial_getc()
196 if (!(readl(&priv->usart->csr) & USART3_BIT(TXRDY))) in atmel_serial_putc()
207 uint32_t csr = readl(&priv->usart->csr); in atmel_serial_pending() local
210 return csr & USART3_BIT(RXRDY) ? 1 : 0; in atmel_serial_pending()
212 return csr & USART3_BIT(TXEMPTY) ? 0 : 1; in atmel_serial_pending()
315 while (!(readl(&usart->csr) & USART3_BIT(TXRDY))) in _debug_uart_putc()
H A Datmel_usart.h21 u32 csr; member
/rk3399_rockchip-uboot/drivers/i2c/
H A Dast_i2c.c151 writel(I2CD_M_STOP_CMD, &priv->regs->csr); in ast_i2c_send_stop()
187 writel(I2CD_M_START_CMD | I2CD_M_TX_CMD, &priv->regs->csr); in ast_i2c_start_txn()
206 writel(i2c_cmd, &priv->regs->csr); in ast_i2c_read_data()
233 writel(I2CD_M_TX_CMD, &priv->regs->csr); in ast_i2c_write_data()
249 u32 csr = readl(&regs->csr); in ast_i2c_deblock() local
250 bool sda_high = csr & I2CD_SDA_LINE_STS; in ast_i2c_deblock()
251 bool scl_high = csr & I2CD_SCL_LINE_STS; in ast_i2c_deblock()
259 debug("Unterminated TXN in (%x), sending stop\n", csr); in ast_i2c_deblock()
263 debug("Bus stuck (%x), attempting recovery\n", csr); in ast_i2c_deblock()
264 writel(I2CD_BUS_RECOVER_CMD, &regs->csr); in ast_i2c_deblock()
H A Dfsl_i2c.c306 u32 csr; in i2c_wait() local
311 csr = readb(&base->sr); in i2c_wait()
312 if (!(csr & I2C_SR_MIF)) in i2c_wait()
315 csr = readb(&base->sr); in i2c_wait()
319 if (csr & I2C_SR_MAL) { in i2c_wait()
324 if (!(csr & I2C_SR_MCF)) { in i2c_wait()
329 if (write == I2C_WRITE_BIT && (csr & I2C_SR_RXAK)) { in i2c_wait()
H A Dast_i2c.h17 u32 csr; member
/rk3399_rockchip-uboot/board/freescale/common/
H A Dpixis.h15 u8 csr; member
54 u8 csr; member
81 u8 csr; member
110 u8 csr; member
140 u8 csr; member
H A Dngpixis.h18 u8 csr; member
H A Dngpixis.c127 printf("csr=%02x\n", PIXIS_READ(csr)); in pixis_dump_regs()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-stm32f4/
H A Dstm32.h67 u32 csr; /* RCC clock control & status */ member
77 u32 csr; member
/rk3399_rockchip-uboot/drivers/net/
H A Daltera_tse.c266 static void msgdma_reset(struct msgdma_csr *csr) in msgdma_reset() argument
272 writel(MSGDMA_CSR_STAT_MASK, &csr->status); in msgdma_reset()
273 writel(MSGDMA_CSR_CTL_RESET, &csr->control); in msgdma_reset()
276 status = readl(&csr->status); in msgdma_reset()
285 writel(MSGDMA_CSR_STAT_MASK, &csr->status); in msgdma_reset()
288 static u32 msgdma_wait(struct msgdma_csr *csr) in msgdma_wait() argument
296 status = readl(&csr->status); in msgdma_wait()
305 writel(MSGDMA_CSR_STAT_MASK, &csr->status); in msgdma_wait()
336 struct msgdma_csr *csr = priv->sgdma_rx; in altera_tse_recv_msgdma() local
340 level = readl(&csr->resp_fill_level); in altera_tse_recv_msgdma()
/rk3399_rockchip-uboot/board/freescale/p1022ds/
H A Ddiu.c180 setbits_8(&pixis->csr, PX_CTL_ALTACC); in platform_diu_init()
230 out_8(lbc_lcs0_ba, offsetof(ngpixis_t, csr)); in set_mux_to_lbc()
266 setbits_8(&pixis->csr, PX_CTL_ALTACC); in set_mux_to_diu()
/rk3399_rockchip-uboot/arch/arm/mach-at91/include/mach/
H A Dat91_mc.h45 u32 csr[8]; /* 0x00 SDRAMC Mode Register */ member
H A Dat91_spi.h28 u32 csr[4]; /* 0x30 Chip Select Register 0-3 */ member
/rk3399_rockchip-uboot/arch/nds32/lib/
H A Dasm-offsets.c63 OFFSET(DWCDDR21MCTL_CSR, dwcddr21mctl, csr); /* 0x0c */ in main()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dimmap_lsch3.h303 u32 csr; member
316 u32 csr; /* core cluster n clock control status */ member
/rk3399_rockchip-uboot/arch/m68k/include/asm/coldfire/
H A Dedma.h68 u16 csr; /* 0x1E Control and Status */ member
/rk3399_rockchip-uboot/arch/arm/cpu/armv8/fsl-layerscape/
H A Dfsl_lsch3_speed.c118 c_pll_sel = (in_le32(&clk_ctrl->clkcncsr[cluster].csr) >> 27) in get_sys_info()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-sunxi/
H A Ddram_sun4i.h19 u32 csr; /* 0x0c controller status register */ member
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-vf610/
H A Dcrm_regs.h17 u32 csr; member

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