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Searched refs:bits_per_pixel (Results 1 – 22 of 22) sorted by relevance

/rk3399_rockchip-uboot/drivers/video/drm/
H A Ddrm_dsc.c88 ((dsc_cfg->bits_per_pixel & DSC_PPS_BPP_HIGH_MASK) >> in drm_dsc_pps_payload_pack()
97 (dsc_cfg->bits_per_pixel & DSC_PPS_LSB_MASK); in drm_dsc_pps_payload_pack()
266 vdsc_cfg->bits_per_pixel, in drm_dsc_compute_rc_parameters()
275 vdsc_cfg->bits_per_pixel, in drm_dsc_compute_rc_parameters()
310 vdsc_cfg->bits_per_pixel + 8) / 16 + num_extra_mux_bits; in drm_dsc_compute_rc_parameters()
366 vdsc_cfg->bits_per_pixel, 16) + in drm_dsc_compute_rc_parameters()
369 hrd_delay = DIV_ROUND_UP((rbs_min * 16), vdsc_cfg->bits_per_pixel); in drm_dsc_compute_rc_parameters()
370 vdsc_cfg->rc_bits = (hrd_delay * vdsc_cfg->bits_per_pixel) / 16; in drm_dsc_compute_rc_parameters()
H A Drockchip_dw_hdmi_qp.c828 u16 bits_per_pixel, u8 bits_per_component) in dw_hdmi_qp_set_link_cfg() argument
838 bits_per_pixel == pps_datas[i].bpp) in dw_hdmi_qp_set_link_cfg()
854 hdmi->link_cfg.hcactive = DIV_ROUND_UP(slice_width * (bits_per_pixel / 16), 8) * in dw_hdmi_qp_set_link_cfg()
867 int bits_per_pixel; in dw_hdmi_qp_dsc_configure() local
893 bits_per_pixel = in dw_hdmi_qp_dsc_configure()
895 if (!bits_per_pixel) in dw_hdmi_qp_dsc_configure()
900 slice_height, bits_per_pixel, depth); in dw_hdmi_qp_dsc_configure()
913 s->dsc_sink_cap.target_bits_per_pixel_x16 = bits_per_pixel; in dw_hdmi_qp_dsc_configure()
/rk3399_rockchip-uboot/drivers/video/
H A Dcoreboot.c25 vesa->bits_per_pixel = fb->bits_per_pixel; in save_vesa_mode()
60 vesa->bits_per_pixel); in coreboot_video_probe()
H A Dmxc_ipuv3_fb.c96 debug("bpp_to_pixfmt: %d\n", fbi->var.bits_per_pixel); in bpp_to_pixfmt()
101 switch (fbi->var.bits_per_pixel) { in bpp_to_pixfmt()
125 fix->line_length = var->xres_virtual * var->bits_per_pixel / 8; in mxcfb_set_fix()
305 if ((var->bits_per_pixel != 32) && (var->bits_per_pixel != 24) && in mxcfb_check_var()
306 (var->bits_per_pixel != 16) && (var->bits_per_pixel != 8)) in mxcfb_check_var()
307 var->bits_per_pixel = default_bpp; in mxcfb_check_var()
309 switch (var->bits_per_pixel) { in mxcfb_check_var()
533 fbi->var.bits_per_pixel = 16; in mxcfb_probe()
534 fbi->fix.line_length = fbi->var.xres * (fbi->var.bits_per_pixel / 8); in mxcfb_probe()
H A Dati_radeon_fb.c624 int bits_per_pixel, i, tmp, vesa_idx = 0, videomode; in video_hw_init() local
662 bits_per_pixel = vesa_modes[i].bits_per_pixel; in video_hw_init()
666 bits_per_pixel = video_get_params (res_mode, penv); in video_hw_init()
683 res_mode->yres, bits_per_pixel, (hsynch / 1000), in video_hw_init()
691 switch (bits_per_pixel) { in video_hw_init()
745 radeon_setmode_9200(vesa_idx, bits_per_pixel); in video_hw_init()
H A Dfsl_diu_fb.c291 info.var.bits_per_pixel = 32; in fsl_diu_init()
301 info.fix.line_length = info.var.xres * info.var.bits_per_pixel / 8; in fsl_diu_init()
305 info.var.xres * info.var.yres * (info.var.bits_per_pixel / 8); in fsl_diu_init()
307 info.var.bits_per_pixel / 8, &info.screen_base); in fsl_diu_init()
H A Dvideomodes.h59 int bits_per_pixel; /* bpp */ member
H A Dmx3fb.c811 int bits_per_pixel, i, tmp, videomode; in video_hw_init() local
843 bits_per_pixel = vesa_modes[i].bits_per_pixel; in video_hw_init()
846 bits_per_pixel = video_get_params(mode, penv); in video_hw_init()
864 bits_per_pixel, (hsynch / 1000), (vsynch / 1000)); in video_hw_init()
871 switch (bits_per_pixel) { in video_hw_init()
H A Dda8xx-fb.c573 if (info->var.bits_per_pixel == 8) { in fb_setcolreg()
586 } else if ((info->var.bits_per_pixel == 16) && regno < 16) { in fb_setcolreg()
602 } else if (((info->var.bits_per_pixel == 32) && regno < 32) || in fb_setcolreg()
603 ((info->var.bits_per_pixel == 24) && regno < 24)) { in fb_setcolreg()
984 da8xx_fb_info->var.bits_per_pixel = da8xx_lcd_cfg->bpp; in video_hw_init()
994 da8xx_fb_var.bits_per_pixel = da8xx_lcd_cfg->bpp; in video_hw_init()
1004 da8xx_fb_info->fix.visual = (da8xx_fb_info->var.bits_per_pixel <= 8) ? in video_hw_init()
H A Dfsl_dcu_fb.c305 info.var.xres * info.var.yres * (info.var.bits_per_pixel / 8); in fsl_dcu_init()
411 info.var.bits_per_pixel = 32; in video_hw_init()
421 info.fix.line_length = info.var.xres * info.var.bits_per_pixel / 8; in video_hw_init()
H A Dmb862xx.c275 bpp = vesa_modes[1].bits_per_pixel; in card_init()
278 bpp = vesa_modes[i].bits_per_pixel; in card_init()
/rk3399_rockchip-uboot/drivers/pci/
H A Dpci_rom.c217 screen_info->lfb_depth = vesa->bits_per_pixel; in setup_video()
335 switch (vesa->bits_per_pixel) { in vbe_setup_video_priv()
381 mode_info.vesa.bits_per_pixel); in vbe_setup_video()
/rk3399_rockchip-uboot/arch/x86/lib/
H A Dcoreboot_table.c156 fb->bits_per_pixel = vesa->bits_per_pixel; in write_coreboot_table()
H A Dbios.c234 mode_info->vesa.bits_per_pixel); in vbe_set_graphics()
/rk3399_rockchip-uboot/include/
H A Dvbe.h63 u8 bits_per_pixel; /* 19 */ member
/rk3399_rockchip-uboot/drivers/video/tegra124/
H A Ddp.c426 link_cfg->bits_per_pixel); in tegra_dc_dp_dump_link_cfg()
511 !link_cfg->bits_per_pixel) in tegra_dc_dp_calc_config()
514 if ((u64)timing->pixelclock.typ * link_cfg->bits_per_pixel >= in tegra_dc_dp_calc_config()
521 ratio_f = (u64)timing->pixelclock.typ * link_cfg->bits_per_pixel * f; in tegra_dc_dp_calc_config()
600 f)) + link_cfg->bits_per_pixel / 4 - 1; in tegra_dc_dp_calc_config()
602 link_cfg->bits_per_pixel) / in tegra_dc_dp_calc_config()
1492 link_cfg->bits_per_pixel = panel_bpp; in tegra_dp_enable()
H A Dsor.h848 u32 bits_per_pixel; member
H A Dsor.c629 reg_val |= (link_cfg->bits_per_pixel > 18) ? in tegra_dc_sor_config_panel()
/rk3399_rockchip-uboot/include/drm/
H A Ddrm_dsc.h130 u16 bits_per_pixel; member
/rk3399_rockchip-uboot/arch/x86/include/asm/
H A Dcoreboot_tables.h133 u8 bits_per_pixel; member
/rk3399_rockchip-uboot/include/linux/
H A Dfb.h112 __u32 bits_per_pixel; /* guess what */ member
/rk3399_rockchip-uboot/drivers/bios_emulator/
H A Datibios.c161 vm->bits_per_pixel, vm->memory_model, in atibios_debug_mode()