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Searched refs:RESET (Results 1 – 25 of 33) sorted by relevance

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/rk3399_rockchip-uboot/arch/arm/mach-exynos/
H A Dsec_boot.S89 .word 0x1 @ CPU0_STATE : RESET
90 .word 0x2 @ CPU1_STATE : SECONDARY RESET
91 .word 0x2 @ CPU2_STATE : SECONDARY RESET
92 .word 0x2 @ CPU3_STATE : SECONDARY RESET
/rk3399_rockchip-uboot/tools/patman/
H A Dterminal.py100 RESET = '\033[0m' variable in Color
139 return self.RESET
162 return start + text + self.RESET
/rk3399_rockchip-uboot/drivers/fpga/
H A Divm_core.c251 { RESET, RESET, 0xFC, 6 }, /* Transitions from RESET */
252 { RESET, IDLE, 0x00, 1 },
253 { RESET, DRPAUSE, 0x50, 5 },
254 { RESET, IRPAUSE, 0x68, 6 },
255 { IDLE, RESET, 0xE0, 3 }, /* Transitions from IDLE */
258 { DRPAUSE, RESET, 0xF8, 5 }, /* Transitions from DRPAUSE */
262 { IRPAUSE, RESET, 0xF8, 5 }, /* Transitions from IRPAUSE */
333 case RESET: in GetState()
2441 (cNextJTAGState != RESET)) { in ispVMStateMachine()
2496 ispVMStateMachine(RESET); /*step devices to RESET state*/ in ispVMStart()
[all …]
/rk3399_rockchip-uboot/drivers/rtc/
H A Dds1302.c20 #define RESET rtc_go_low(RST), rtc_go_low(SCLK) macro
166 RESET; in read_ser_drv()
186 RESET; in write_ser_drv()
/rk3399_rockchip-uboot/board/freescale/mx28evk/
H A DREADME20 * JTAG PSWITCH RESET: To the right (reset disabled)
29 * JTAG PSWITCH RESET: To the right (reset disabled)
/rk3399_rockchip-uboot/board/rockchip/evb_rk3399/
H A DREADME99 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
107 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
/rk3399_rockchip-uboot/include/
H A Dlattice.h30 #define RESET 0x00 macro
/rk3399_rockchip-uboot/board/rockchip/sheep_rk3368/
H A DREADME23 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
/rk3399_rockchip-uboot/board/rockchip/evb_rv1108/
H A DREADME16 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
/rk3399_rockchip-uboot/doc/
H A DREADME.bus_vcxk54 RESET
H A DREADME.esbc_validate28 5. In case of hard failure, SoC is issued RESET REQUEST after
H A DREADME.m54418twr232 reset - Perform RESET of the CPU
/rk3399_rockchip-uboot/board/rockchip/evb_rk3328/
H A DREADME66 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
/rk3399_rockchip-uboot/drivers/video/drm/
H A Drk618_dsi.c26 #define RESET 0 macro
556 dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, RESET); in rk618_dsi_pre_enable()
687 dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, RESET); in rk618_dsi_enable()
699 dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, RESET); in rk618_dsi_disable()
708 dsi_update_bits(dsi, DSI_PWR_UP, SHUTDOWNZ, RESET); in rk618_dsi_post_disable()
H A Ddw_mipi_dsi.c32 #define RESET 0 macro
904 dsi_write(dsi, DSI_PWR_UP, RESET); in dw_mipi_dsi_enable()
924 dsi_write(dsi, DSI_PWR_UP, RESET); in dw_mipi_dsi_disable()
942 dsi_write(dsi, DSI_PWR_UP, RESET); in dw_mipi_dsi_post_disable()
958 dsi_write(dsi, DSI_PWR_UP, RESET); in dw_mipi_dsi_init()
H A Ddw_mipi_dsi2.c35 #define RESET 0 macro
727 dsi_write(dsi2, DSI2_PWR_UP, RESET); in dw_mipi_dsi2_post_disable()
1147 dsi_write(dsi2, DSI2_PWR_UP, RESET); in dw_mipi_dsi2_pre_enable()
/rk3399_rockchip-uboot/board/rockchip/kylin_rk3036/
H A DREADME53 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
/rk3399_rockchip-uboot/board/rockchip/gva_rk3229/
H A DREADME61 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
/rk3399_rockchip-uboot/board/rockchip/evb_rk3229/
H A DREADME57 Power on(or reset with RESET KEY) with MASKROM KEY preesed, and then:
/rk3399_rockchip-uboot/drivers/video/drm/rk628/
H A Drk628_dsi.h17 #define RESET 0 macro
H A Drk628_dsi.c1105 dsi_write(rk628, dsi, DSI_PWR_UP, RESET); in rk628_dsi_bridge_pre_enable()
1230 dsi_write(rk628, dsi, DSI_PWR_UP, RESET); in rk628_dsi_bridge_enable()
1366 dsi_write(rk628, dsi, DSI_PWR_UP, RESET); in rk628_dsi_disable()
1375 dsi_write(rk628, dsi1, DSI_PWR_UP, RESET); in rk628_dsi_disable()
/rk3399_rockchip-uboot/drivers/usb/musb/
H A Dmusb_debug.h22 MUSB_FLAGS_PRINT(b, POWER, RESET); in musb_print_pwr()
/rk3399_rockchip-uboot/arch/arm/dts/
H A Darmada-8040-mcbin.dts208 * [9] CP1 10G PHY RESET
H A Dimx6ull-14x14-evk.dts181 MX6UL_PAD_GPIO1_IO09__GPIO1_IO09 0x17059 /* SD1 RESET */
/rk3399_rockchip-uboot/board/freescale/m52277evb/
H A DREADME223 reset - Perform RESET of the CPU

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