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Searched refs:PCDR (Results 1 – 12 of 12) sorted by relevance

/rk3399_rockchip-uboot/arch/arm/cpu/arm920t/imx/
H A Dspeed.c73 return get_systemPLLCLK() / (((PCDR) & 0xf)+1); in get_PERCLK1()
78 return get_systemPLLCLK() / (((PCDR>>4) & 0xf)+1); in get_PERCLK2()
83 return get_systemPLLCLK() / (((PCDR>>16) & 0x7f)+1); in get_PERCLK3()
/rk3399_rockchip-uboot/arch/sh/include/asm/
H A Dcpu_sh7203.h17 #define PCDR 0xA4050124 macro
H A Dcpu_sh7264.h17 #define PCDR 0xA4050124 macro
H A Dcpu_sh7706.h20 #define PCDR 0xA4050124 macro
H A Dcpu_sh7710.h20 #define PCDR 0xA4050124 macro
H A Dcpu_sh7723.h163 #define PCDR 0xA4050124 macro
H A Dcpu_sh7724.h185 #define PCDR 0xA4050124 macro
H A Dcpu_sh7720.h188 #define PCDR (PORT_BASE + 0x44) macro
H A Dcpu_sh7780.h414 #define PCDR 0xFFEA0024 macro
H A Dcpu_sh7722.h1235 #define PCDR 0xA4050124 macro
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-imx/
H A Dimx-regs.h105 #define PCDR __REG(IMX_PLL_BASE + 0x20) /* Peripheral Clock Divider Register */ macro
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h415 #define PCDR 0x40500040 /* PCM FIFO Data Register */ macro