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Searched refs:FIELD_PREP (Results 1 – 22 of 22) sorted by relevance

/rk3399_rockchip-uboot/drivers/phy/
H A Dphy-rockchip-samsung-hdptx.c721 FIELD_PREP(LN_TX_SER_40BIT_EN_RBR, 0x1)); in rockchip_hdptx_phy_set_voltage()
724 FIELD_PREP(LN_TX_JEQ_EVEN_CTRL_RBR, ctrl->tx_jeq_even_ctrl)); in rockchip_hdptx_phy_set_voltage()
727 FIELD_PREP(LN_TX_JEQ_ODD_CTRL_RBR, ctrl->tx_jeq_odd_ctrl)); in rockchip_hdptx_phy_set_voltage()
734 FIELD_PREP(LN_TX_SER_40BIT_EN_HBR, 0x1)); in rockchip_hdptx_phy_set_voltage()
737 FIELD_PREP(LN_TX_JEQ_EVEN_CTRL_HBR, ctrl->tx_jeq_even_ctrl)); in rockchip_hdptx_phy_set_voltage()
740 FIELD_PREP(LN_TX_JEQ_ODD_CTRL_HBR, ctrl->tx_jeq_odd_ctrl)); in rockchip_hdptx_phy_set_voltage()
749 FIELD_PREP(LN_TX_SER_40BIT_EN_HBR, 0x1)); in rockchip_hdptx_phy_set_voltage()
752 FIELD_PREP(LN_TX_JEQ_EVEN_CTRL_HBR, ctrl->tx_jeq_even_ctrl)); in rockchip_hdptx_phy_set_voltage()
755 FIELD_PREP(LN_TX_JEQ_ODD_CTRL_HBR, ctrl->tx_jeq_odd_ctrl)); in rockchip_hdptx_phy_set_voltage()
761 FIELD_PREP(LN_TX_SER_40BIT_EN_HBR2, 0x1)); in rockchip_hdptx_phy_set_voltage()
[all …]
H A Dphy-rockchip-naneng-edp.c105 FIELD_PREP(EDP_PHY_TX0_EMP, emp)); in rockchip_edp_phy_set_voltage()
108 FIELD_PREP(EDP_PHY_TX0_AMP, amp)); in rockchip_edp_phy_set_voltage()
111 FIELD_PREP(EDP_PHY_TX0_AMP_SCALE, amp_scale)); in rockchip_edp_phy_set_voltage()
116 FIELD_PREP(EDP_PHY_TX1_EMP, emp)); in rockchip_edp_phy_set_voltage()
119 FIELD_PREP(EDP_PHY_TX1_AMP, amp)); in rockchip_edp_phy_set_voltage()
122 FIELD_PREP(EDP_PHY_TX1_AMP_SCALE, amp_scale)); in rockchip_edp_phy_set_voltage()
127 FIELD_PREP(EDP_PHY_TX2_EMP, emp)); in rockchip_edp_phy_set_voltage()
130 FIELD_PREP(EDP_PHY_TX2_AMP, amp)); in rockchip_edp_phy_set_voltage()
133 FIELD_PREP(EDP_PHY_TX2_AMP_SCALE, amp_scale)); in rockchip_edp_phy_set_voltage()
138 FIELD_PREP(EDP_PHY_TX3_EMP, emp)); in rockchip_edp_phy_set_voltage()
[all …]
H A Dphy-rockchip-usbdp.c561 FIELD_PREP(DP_AUX_DIN_SEL, udphy->dp_aux_din_sel) | in udphy_dplane_select()
562 FIELD_PREP(DP_AUX_DOUT_SEL, udphy->dp_aux_dout_sel) | value); in udphy_dplane_select()
597 FIELD_PREP(CMN_DP_LANE_EN_ALL, val)); in udphy_dplane_enable()
601 CMN_DP_CMN_RSTN, FIELD_PREP(CMN_DP_CMN_RSTN, 0x0)); in udphy_dplane_enable()
721 FIELD_PREP(CMN_DP_LANE_MUX_N(3), udphy->lane_mux_sel[3]) | in udphy_init()
722 FIELD_PREP(CMN_DP_LANE_MUX_N(2), udphy->lane_mux_sel[2]) | in udphy_init()
723 FIELD_PREP(CMN_DP_LANE_MUX_N(1), udphy->lane_mux_sel[1]) | in udphy_init()
724 FIELD_PREP(CMN_DP_LANE_MUX_N(0), udphy->lane_mux_sel[0]) | in udphy_init()
725 FIELD_PREP(CMN_DP_LANE_EN_ALL, 0)); in udphy_init()
734 FIELD_PREP(CMN_DP_INIT_RSTN, 0x1)); in udphy_init()
[all …]
/rk3399_rockchip-uboot/drivers/video/drm/
H A Dmax96755f.c28 FIELD_PREP(NUM_LANES, priv->num_lanes - 1)); in max96755f_mipi_dsi_rx_config()
49 dm_i2c_reg_write(priv->dev, 0x0385, FIELD_PREP(DPI_HSYNC_WIDTH_L, hsa)); in max96755f_mipi_dsi_rx_config()
50 dm_i2c_reg_write(priv->dev, 0x0386, FIELD_PREP(DPI_VYSNC_WIDTH_L, vsa)); in max96755f_mipi_dsi_rx_config()
52 FIELD_PREP(DPI_VSYNC_WIDTH_H, (vsa >> 8)) | in max96755f_mipi_dsi_rx_config()
53 FIELD_PREP(DPI_HSYNC_WIDTH_H, (hsa >> 8))); in max96755f_mipi_dsi_rx_config()
54 dm_i2c_reg_write(priv->dev, 0x03a5, FIELD_PREP(DPI_VFP_L, vfp)); in max96755f_mipi_dsi_rx_config()
56 FIELD_PREP(DPI_VBP_L, vbp) | in max96755f_mipi_dsi_rx_config()
57 FIELD_PREP(DPI_VFP_H, (vfp >> 8))); in max96755f_mipi_dsi_rx_config()
58 dm_i2c_reg_write(priv->dev, 0x03a7, FIELD_PREP(DPI_VBP_H, (vbp >> 4))); in max96755f_mipi_dsi_rx_config()
59 dm_i2c_reg_write(priv->dev, 0x03a8, FIELD_PREP(DPI_VACT_L, vact)); in max96755f_mipi_dsi_rx_config()
[all …]
H A Ddw-dp.c395 value = FIELD_PREP(AUX_LEN_REQ, msg->size - 1); in dw_dp_aux_transfer()
397 value = FIELD_PREP(I2C_ADDR_ONLY, 1); in dw_dp_aux_transfer()
399 value |= FIELD_PREP(AUX_CMD_TYPE, msg->request); in dw_dp_aux_transfer()
400 value |= FIELD_PREP(AUX_ADDR, msg->address); in dw_dp_aux_transfer()
457 FIELD_PREP(FORCE_HPD, 1)); in dw_dp_hpd_init()
464 FIELD_PREP(HPD_UNPLUG_EN, 1) | in dw_dp_hpd_init()
465 FIELD_PREP(HPD_PLUG_EN, 1) | in dw_dp_hpd_init()
466 FIELD_PREP(HPD_IRQ_EN, 1)); in dw_dp_hpd_init()
470 HPD_EVENT_EN, FIELD_PREP(HPD_EVENT_EN, 1)); in dw_dp_hpd_init()
476 FIELD_PREP(AUX_RESET, 1)); in dw_dp_aux_init()
[all …]
H A Dmax96745.c58 FIELD_PREP(TX_RATE, 2)); in max96745_bridge_enable()
63 FIELD_PREP(RESET_ONESHOT, 1)); in max96745_bridge_enable()
93 FIELD_PREP(TX_RATE, 1)); in max96745_bridge_post_disable()
98 FIELD_PREP(RESET_ONESHOT, 1)); in max96745_bridge_post_disable()
H A Danalogix_dp.c1052 EDP_MODE << 16 | FIELD_PREP(EDP_MODE, 1)); in analogix_dp_connector_enable()
1141 EDP_MODE << 16 | FIELD_PREP(EDP_MODE, 0)); in analogix_dp_connector_disable()
/rk3399_rockchip-uboot/drivers/video/drm/display-serdes/maxim/
H A Dmaxim-max96755.c378 FIELD_PREP(VID_TX_EN_X, 0)); in max96755_bridge_disable()
431 FIELD_PREP(GPIO_OUT_DIS, fdata->gpio_out_dis) | in max96755_pinctrl_set_pin_mux()
432 FIELD_PREP(GPIO_RX_EN, fdata->gpio_rx_en) | in max96755_pinctrl_set_pin_mux()
433 FIELD_PREP(GPIO_TX_EN, fdata->gpio_tx_en)); in max96755_pinctrl_set_pin_mux()
439 FIELD_PREP(GPIO_TX_ID, fdata->gpio_tx_id)); in max96755_pinctrl_set_pin_mux()
444 FIELD_PREP(GPIO_RX_ID, fdata->gpio_rx_id)); in max96755_pinctrl_set_pin_mux()
497 FIELD_PREP(GPIO_OUT_DIS, fdata->gpio_out_dis) | in max96755_pinctrl_set_grp_mux()
498 FIELD_PREP(GPIO_RX_EN, fdata->gpio_rx_en) | in max96755_pinctrl_set_grp_mux()
499 FIELD_PREP(GPIO_TX_EN, fdata->gpio_tx_en)); in max96755_pinctrl_set_grp_mux()
504 FIELD_PREP(GPIO_TX_ID, fdata->gpio_tx_id)); in max96755_pinctrl_set_grp_mux()
[all …]
H A Dmaxim-max96789.c378 FIELD_PREP(VID_TX_EN_X, 0)); in max96789_bridge_disable()
431 FIELD_PREP(GPIO_OUT_DIS, fdata->gpio_out_dis) | in max96789_pinctrl_set_pin_mux()
432 FIELD_PREP(GPIO_RX_EN, fdata->gpio_rx_en) | in max96789_pinctrl_set_pin_mux()
433 FIELD_PREP(GPIO_TX_EN, fdata->gpio_tx_en)); in max96789_pinctrl_set_pin_mux()
439 FIELD_PREP(GPIO_TX_ID, fdata->gpio_tx_id)); in max96789_pinctrl_set_pin_mux()
444 FIELD_PREP(GPIO_RX_ID, fdata->gpio_rx_id)); in max96789_pinctrl_set_pin_mux()
497 FIELD_PREP(GPIO_OUT_DIS, fdata->gpio_out_dis) | in max96789_pinctrl_set_grp_mux()
498 FIELD_PREP(GPIO_RX_EN, fdata->gpio_rx_en) | in max96789_pinctrl_set_grp_mux()
499 FIELD_PREP(GPIO_TX_EN, fdata->gpio_tx_en)); in max96789_pinctrl_set_grp_mux()
504 FIELD_PREP(GPIO_TX_ID, fdata->gpio_tx_id)); in max96789_pinctrl_set_grp_mux()
[all …]
H A Dmaxim-max96745.c427 FIELD_PREP(TX_RATE, 2)); in max96745_bridge_enable()
432 FIELD_PREP(RESET_ONESHOT, 1)); in max96745_bridge_enable()
464 FIELD_PREP(TX_RATE, 1)); in max96745_bridge_disable()
469 FIELD_PREP(RESET_ONESHOT, 1)); in max96745_bridge_disable()
529 FIELD_PREP(GPIO_OUT_DIS, data->gpio_out_dis)); in max96745_pinctrl_set_pin_mux()
534 FIELD_PREP(GPIO_TX_ID, data->gpio_tx_id)); in max96745_pinctrl_set_pin_mux()
539 FIELD_PREP(GPIO_RX_ID, data->gpio_rx_id)); in max96745_pinctrl_set_pin_mux()
544 FIELD_PREP(GPIO_TX_EN_A, data->gpio_tx_en_a) | in max96745_pinctrl_set_pin_mux()
545 FIELD_PREP(GPIO_TX_EN_B, data->gpio_tx_en_b) | in max96745_pinctrl_set_pin_mux()
546 FIELD_PREP(GPIO_RX_EN_A, data->gpio_rx_en_a) | in max96745_pinctrl_set_pin_mux()
[all …]
H A Dmaxim-max96752.c334 FIELD_PREP(GPIO_OUT_DIS, fdata->gpio_out_dis) | in max96752_pinctrl_set_pin_mux()
335 FIELD_PREP(GPIO_RX_EN, fdata->gpio_rx_en) | in max96752_pinctrl_set_pin_mux()
336 FIELD_PREP(GPIO_TX_EN, fdata->gpio_tx_en) | in max96752_pinctrl_set_pin_mux()
337 FIELD_PREP(GPIO_OUT, fdata->gpio_out_level)); in max96752_pinctrl_set_pin_mux()
342 FIELD_PREP(GPIO_TX_ID, fdata->gpio_tx_id)); in max96752_pinctrl_set_pin_mux()
347 FIELD_PREP(GPIO_RX_ID, fdata->gpio_rx_id)); in max96752_pinctrl_set_pin_mux()
401 FIELD_PREP(GPIO_OUT_DIS, fdata->gpio_out_dis) | in max96752_pinctrl_set_grp_mux()
402 FIELD_PREP(GPIO_RX_EN, fdata->gpio_rx_en) | in max96752_pinctrl_set_grp_mux()
403 FIELD_PREP(GPIO_TX_EN, fdata->gpio_tx_en) | in max96752_pinctrl_set_grp_mux()
404 FIELD_PREP(GPIO_OUT, fdata->gpio_out_level)); in max96752_pinctrl_set_grp_mux()
[all …]
H A Dmaxim-max96772.c511 FIELD_PREP(GPIO_OUT_DIS, fdata->gpio_out_dis) | in max96772_pinctrl_set_pin_mux()
512 FIELD_PREP(GPIO_RX_EN, fdata->gpio_rx_en) | in max96772_pinctrl_set_pin_mux()
513 FIELD_PREP(GPIO_TX_EN, fdata->gpio_tx_en) | in max96772_pinctrl_set_pin_mux()
514 FIELD_PREP(GPIO_OUT, fdata->gpio_out_level)); in max96772_pinctrl_set_pin_mux()
519 FIELD_PREP(GPIO_TX_ID, fdata->gpio_tx_id)); in max96772_pinctrl_set_pin_mux()
524 FIELD_PREP(GPIO_RX_ID, fdata->gpio_rx_id)); in max96772_pinctrl_set_pin_mux()
577 FIELD_PREP(GPIO_OUT_DIS, fdata->gpio_out_dis) | in max96772_pinctrl_set_grp_mux()
578 FIELD_PREP(GPIO_RX_EN, fdata->gpio_rx_en) | in max96772_pinctrl_set_grp_mux()
579 FIELD_PREP(GPIO_TX_EN, fdata->gpio_tx_en) | in max96772_pinctrl_set_grp_mux()
580 FIELD_PREP(GPIO_OUT, fdata->gpio_out_level)); in max96772_pinctrl_set_grp_mux()
[all …]
/rk3399_rockchip-uboot/drivers/i2c/muxes/
H A Dmax96755f.c21 FIELD_PREP(DIS_REM_CC, 0)); in max96755f_select()
33 FIELD_PREP(RESET_ONESHOT, 1) | in max96755f_select()
34 FIELD_PREP(AUTO_LINK, 0) | in max96755f_select()
35 FIELD_PREP(LINK_CFG, LINKA)); in max96755f_select()
40 FIELD_PREP(RESET_ONESHOT, 1) | in max96755f_select()
41 FIELD_PREP(AUTO_LINK, 0) | in max96755f_select()
42 FIELD_PREP(LINK_CFG, LINKB)); in max96755f_select()
55 FIELD_PREP(DIS_REM_CC, 1)); in max96755f_deselect()
74 FIELD_PREP(RESET_ALL, 1)); in max96755f_power_on()
81 FIELD_PREP(DIS_REM_CC, 1)); in max96755f_power_on()
H A Dmax96745.c30 FIELD_PREP(DIS_REM_CC, 0)); in max96745_select()
33 FIELD_PREP(DIS_REM_CC, 0)); in max96745_select()
48 FIELD_PREP(DIS_REM_CC, 1)); in max96745_deselect()
51 FIELD_PREP(DIS_REM_CC, 1)); in max96745_deselect()
82 FIELD_PREP(DIS_REM_CC, 1)); in max96745_power_on()
87 FIELD_PREP(DIS_REM_CC, 1)); in max96745_power_on()
/rk3399_rockchip-uboot/drivers/pinctrl/
H A Dpinctrl-max96755f.c354 FIELD_PREP(GPIO_OUT_DIS, func->gpio_out_dis) | in max96755f_pinmux_set()
355 FIELD_PREP(GPIO_RX_EN, func->gpio_rx_en) | in max96755f_pinmux_set()
356 FIELD_PREP(GPIO_TX_EN, func->gpio_tx_en)); in max96755f_pinmux_set()
363 FIELD_PREP(GPIO_TX_ID, func->gpio_tx_id)); in max96755f_pinmux_set()
372 FIELD_PREP(GPIO_RX_ID, func->gpio_rx_id)); in max96755f_pinmux_set()
398 FIELD_PREP(OUT_TYPE, 0)); in max96755f_pinconf_set()
405 FIELD_PREP(OUT_TYPE, 1)); in max96755f_pinconf_set()
413 FIELD_PREP(PULL_UPDN_SEL, 0)); in max96755f_pinconf_set()
431 FIELD_PREP(RES_CFG, res_cfg)); in max96755f_pinconf_set()
437 FIELD_PREP(PULL_UPDN_SEL, 1)); in max96755f_pinconf_set()
[all …]
H A Dpinctrl-max96745.c362 FIELD_PREP(GPIO_OUT_DIS, func->gpio_out_dis)); in max96745_pinmux_set()
367 FIELD_PREP(GPIO_TX_ID, func->gpio_tx_id)); in max96745_pinmux_set()
372 FIELD_PREP(GPIO_RX_ID, func->gpio_rx_id)); in max96745_pinmux_set()
377 FIELD_PREP(GPIO_TX_EN_A, func->gpio_tx_en_a) | in max96745_pinmux_set()
378 FIELD_PREP(GPIO_TX_EN_B, func->gpio_tx_en_b) | in max96745_pinmux_set()
379 FIELD_PREP(GPIO_RX_EN_A, func->gpio_rx_en_a) | in max96745_pinmux_set()
380 FIELD_PREP(GPIO_RX_EN_B, func->gpio_rx_en_b) | in max96745_pinmux_set()
381 FIELD_PREP(GPIO_IO_RX_EN, func->gpio_io_rx_en)); in max96745_pinmux_set()
/rk3399_rockchip-uboot/drivers/video/drm/display-serdes/rohm/
H A Drohm-bu18rl82.c251 FIELD_PREP(BIT(2) | BIT(1), argument)); in bu18rl82_pinctrl_config_set()
259 FIELD_PREP(BIT(4), argument)); in bu18rl82_pinctrl_config_set()
267 FIELD_PREP(BIT(3), argument)); in bu18rl82_pinctrl_config_set()
320 FIELD_PREP(BIT(3), fdata->gpio_rx_en)); in bu18rl82_pinctrl_set_pin_mux()
323 FIELD_PREP(GENMASK(7, 0), in bu18rl82_pinctrl_set_pin_mux()
327 FIELD_PREP(GENMASK(2, 0), in bu18rl82_pinctrl_set_pin_mux()
331 FIELD_PREP(BIT(4), 0)); in bu18rl82_pinctrl_set_pin_mux()
380 FIELD_PREP(BIT(3), fdata->gpio_rx_en)); in bu18rl82_pinctrl_set_grp_mux()
383 FIELD_PREP(GENMASK(7, 0), in bu18rl82_pinctrl_set_grp_mux()
387 FIELD_PREP(GENMASK(2, 0), in bu18rl82_pinctrl_set_grp_mux()
[all …]
H A Drohm-bu18tl82.c240 FIELD_PREP(BIT(2) | BIT(1), argument)); in bu18tl82_pinctrl_config_set()
248 FIELD_PREP(BIT(4), argument)); in bu18tl82_pinctrl_config_set()
257 FIELD_PREP(BIT(3), argument)); in bu18tl82_pinctrl_config_set()
307 FIELD_PREP(BIT(3), fdata->gpio_rx_en)); in bu18tl82_pinctrl_set_pin_mux()
310 FIELD_PREP(GENMASK(7, 0), in bu18tl82_pinctrl_set_pin_mux()
314 FIELD_PREP(GENMASK(2, 0), in bu18tl82_pinctrl_set_pin_mux()
318 FIELD_PREP(BIT(4), 0)); in bu18tl82_pinctrl_set_pin_mux()
364 FIELD_PREP(BIT(3), fdata->gpio_rx_en)); in bu18tl82_pinctrl_set_grp_mux()
367 FIELD_PREP(GENMASK(7, 0), in bu18tl82_pinctrl_set_grp_mux()
371 FIELD_PREP(GENMASK(2, 0), in bu18tl82_pinctrl_set_grp_mux()
[all …]
/rk3399_rockchip-uboot/drivers/usb/dwc3/
H A Ddwc3-meson-g12a.c186 FIELD_PREP(USB_R3_P30_SSC_RANGE_MASK, 2) | in dwc3_meson_g12a_usb3_init()
192 FIELD_PREP(USB_R2_P30_PCS_TX_DEEMPH_3P5DB_MASK, 0x15)); in dwc3_meson_g12a_usb3_init()
196 FIELD_PREP(USB_R2_P30_PCS_TX_DEEMPH_6DB_MASK, 0x20)); in dwc3_meson_g12a_usb3_init()
206 FIELD_PREP(USB_R1_P30_PCS_TX_SWING_FULL_MASK, 127)); in dwc3_meson_g12a_usb3_init()
236 FIELD_PREP(USB_R1_U3H_FLADJ_30MHZ_REG_MASK, 0x20)); in dwc3_meson_g12a_usb_init()
246 FIELD_PREP(USB_R5_ID_DIG_TH_MASK, 0xff)); in dwc3_meson_g12a_usb_init()
/rk3399_rockchip-uboot/include/linux/
H A Dbitfield.h86 #define FIELD_PREP(_mask, _val) \ macro
/rk3399_rockchip-uboot/drivers/mtd/nand/raw/
H A Ddenali.c981 tmp |= FIELD_PREP(ACC_CLKS__VALUE, acc_clks); in denali_setup_data_interface()
990 tmp |= FIELD_PREP(RE_2_WE__VALUE, re_2_we); in denali_setup_data_interface()
999 tmp |= FIELD_PREP(RE_2_RE__VALUE, re_2_re); in denali_setup_data_interface()
1013 tmp |= FIELD_PREP(TWHR2_AND_WE_2_RE__WE_2_RE, we_2_re); in denali_setup_data_interface()
1028 tmp |= FIELD_PREP(TCWAW_AND_ADDR_2_DATA__ADDR_2_DATA, addr_2_data); in denali_setup_data_interface()
1038 tmp |= FIELD_PREP(RDWR_EN_HI_CNT__VALUE, rdwr_en_hi); in denali_setup_data_interface()
1051 tmp |= FIELD_PREP(RDWR_EN_LO_CNT__VALUE, rdwr_en_lo); in denali_setup_data_interface()
1062 tmp |= FIELD_PREP(CS_SETUP_CNT__VALUE, cs_setup); in denali_setup_data_interface()
1310 iowrite32(FIELD_PREP(ECC_CORRECTION__ERASE_THRESHOLD, 1) | in denali_init()
1311 FIELD_PREP(ECC_CORRECTION__VALUE, chip->ecc.strength), in denali_init()
/rk3399_rockchip-uboot/drivers/pci/
H A Dpcie_dw_rockchip.c128 #define PORT_LINK_MODE(n) FIELD_PREP(PORT_LINK_MODE_MASK, n)
134 #define PORT_LOGIC_LINK_WIDTH(n) FIELD_PREP(PORT_LOGIC_LINK_WIDTH_MASK, n)