427 				      FIELD_PREP(TX_RATE, 2));  in max96745_bridge_enable()
432 				      FIELD_PREP(RESET_ONESHOT, 1));  in max96745_bridge_enable()
464 				      FIELD_PREP(TX_RATE, 1));  in max96745_bridge_disable()
469 				      FIELD_PREP(RESET_ONESHOT, 1));  in max96745_bridge_disable()
529 					FIELD_PREP(GPIO_OUT_DIS, data->gpio_out_dis));  in max96745_pinctrl_set_pin_mux()
534 						FIELD_PREP(GPIO_TX_ID, data->gpio_tx_id));  in max96745_pinctrl_set_pin_mux()
539 						FIELD_PREP(GPIO_RX_ID, data->gpio_rx_id));  in max96745_pinctrl_set_pin_mux()
544 					FIELD_PREP(GPIO_TX_EN_A, data->gpio_tx_en_a) |  in max96745_pinctrl_set_pin_mux()
545 					FIELD_PREP(GPIO_TX_EN_B, data->gpio_tx_en_b) |  in max96745_pinctrl_set_pin_mux()
546 					FIELD_PREP(GPIO_RX_EN_A, data->gpio_rx_en_a) |  in max96745_pinctrl_set_pin_mux()
547 					FIELD_PREP(GPIO_RX_EN_B, data->gpio_rx_en_b) |  in max96745_pinctrl_set_pin_mux()
548 					FIELD_PREP(GPIO_IO_RX_EN, data->gpio_io_rx_en));  in max96745_pinctrl_set_pin_mux()
600 					FIELD_PREP(GPIO_OUT_DIS, fdata->gpio_out_dis));  in max96745_pinctrl_set_grp_mux()
605 						FIELD_PREP(GPIO_TX_ID, fdata->gpio_tx_id));  in max96745_pinctrl_set_grp_mux()
610 						FIELD_PREP(GPIO_RX_ID, fdata->gpio_rx_id));  in max96745_pinctrl_set_grp_mux()
615 					FIELD_PREP(GPIO_TX_EN_A, fdata->gpio_tx_en_a) |  in max96745_pinctrl_set_grp_mux()
616 					FIELD_PREP(GPIO_TX_EN_B, fdata->gpio_tx_en_b) |  in max96745_pinctrl_set_grp_mux()
617 					FIELD_PREP(GPIO_RX_EN_A, fdata->gpio_rx_en_a) |  in max96745_pinctrl_set_grp_mux()
618 					FIELD_PREP(GPIO_RX_EN_B, fdata->gpio_rx_en_b) |  in max96745_pinctrl_set_grp_mux()
619 					FIELD_PREP(GPIO_IO_RX_EN, fdata->gpio_io_rx_en));  in max96745_pinctrl_set_grp_mux()
636 				OUT_TYPE, FIELD_PREP(OUT_TYPE, 0));  in max96745_pinctrl_config_set()
640 				OUT_TYPE, FIELD_PREP(OUT_TYPE, 1));  in max96745_pinctrl_config_set()
645 				FIELD_PREP(PULL_UPDN_SEL, 0));  in max96745_pinctrl_config_set()
660 				RES_CFG, FIELD_PREP(RES_CFG, res_cfg));  in max96745_pinctrl_config_set()
663 				FIELD_PREP(PULL_UPDN_SEL, 1));  in max96745_pinctrl_config_set()
678 				RES_CFG, FIELD_PREP(RES_CFG, res_cfg));  in max96745_pinctrl_config_set()
681 				FIELD_PREP(PULL_UPDN_SEL, 2));  in max96745_pinctrl_config_set()
686 					FIELD_PREP(GPIO_OUT_DIS, 0) |  in max96745_pinctrl_config_set()
687 					FIELD_PREP(GPIO_OUT, argument));  in max96745_pinctrl_config_set()
747 				FIELD_PREP(DIS_REM_CC, 0));  in max96745_select()
749 				FIELD_PREP(DIS_REM_CC, 0));  in max96745_select()
755 				FIELD_PREP(DIS_REM_CC, 0));  in max96745_select()
757 				FIELD_PREP(DIS_REM_CC, 1));  in max96745_select()
763 				FIELD_PREP(DIS_REM_CC, 1));  in max96745_select()
765 				FIELD_PREP(DIS_REM_CC, 0));  in max96745_select()
771 				FIELD_PREP(DIS_REM_CC, 0));  in max96745_select()
773 				FIELD_PREP(DIS_REM_CC, 0));  in max96745_select()
786 				FIELD_PREP(DIS_REM_CC, 1));  in max96745_deselect()
788 				FIELD_PREP(DIS_REM_CC, 1));  in max96745_deselect()
794 				FIELD_PREP(DIS_REM_CC, 1));  in max96745_deselect()
796 				FIELD_PREP(DIS_REM_CC, 0));  in max96745_deselect()
802 				FIELD_PREP(DIS_REM_CC, 0));  in max96745_deselect()
804 				FIELD_PREP(DIS_REM_CC, 1));  in max96745_deselect()
810 				FIELD_PREP(DIS_REM_CC, 1));  in max96745_deselect()
812 				FIELD_PREP(DIS_REM_CC, 1));  in max96745_deselect()