| /rk3399_rockchip-uboot/lib/ |
| H A D | sha1.c | 98 unsigned long temp, W[16], A, B, C, D, E; in sha1_process_one() local
132 D = ctx->state[3]; in sha1_process_one()
138 P (A, B, C, D, E, W[0]); in sha1_process_one()
139 P (E, A, B, C, D, W[1]); in sha1_process_one()
140 P (D, E, A, B, C, W[2]); in sha1_process_one()
141 P (C, D, E, A, B, W[3]); in sha1_process_one()
142 P (B, C, D, E, A, W[4]); in sha1_process_one()
143 P (A, B, C, D, E, W[5]); in sha1_process_one()
144 P (E, A, B, C, D, W[6]); in sha1_process_one()
145 P (D, E, A, B, C, W[7]); in sha1_process_one()
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| H A D | sha256.c | 88 uint32_t A, B, C, D, E, F, G, H; in sha256_process_one() local
134 D = ctx->state[3]; in sha256_process_one()
140 P(A, B, C, D, E, F, G, H, W[0], 0x428A2F98); in sha256_process_one()
141 P(H, A, B, C, D, E, F, G, W[1], 0x71374491); in sha256_process_one()
142 P(G, H, A, B, C, D, E, F, W[2], 0xB5C0FBCF); in sha256_process_one()
143 P(F, G, H, A, B, C, D, E, W[3], 0xE9B5DBA5); in sha256_process_one()
144 P(E, F, G, H, A, B, C, D, W[4], 0x3956C25B); in sha256_process_one()
145 P(D, E, F, G, H, A, B, C, W[5], 0x59F111F1); in sha256_process_one()
146 P(C, D, E, F, G, H, A, B, W[6], 0x923F82A4); in sha256_process_one()
147 P(B, C, D, E, F, G, H, A, W[7], 0xAB1C5ED5); in sha256_process_one()
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| H A D | sha512.c | 162 uint64_t A, B, C, D, E, F, G, H; in sha512_process() local
195 D = ctx->state[3]; in sha512_process()
203 P(A, B, C, D, E, F, G, H, W[i], K[i]); in sha512_process()
205 P(H, A, B, C, D, E, F, G, W[i], K[i]); in sha512_process()
207 P(G, H, A, B, C, D, E, F, W[i], K[i]); in sha512_process()
209 P(F, G, H, A, B, C, D, E, W[i], K[i]); in sha512_process()
211 P(E, F, G, H, A, B, C, D, W[i], K[i]); in sha512_process()
213 P(D, E, F, G, H, A, B, C, W[i], K[i]); in sha512_process()
215 P(C, D, E, F, G, H, A, B, W[i], K[i]); in sha512_process()
217 P(B, C, D, E, F, G, H, A, W[i], K[i]); in sha512_process()
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| /rk3399_rockchip-uboot/tools/rockchip/ |
| H A D | sha.c | 61 register uint32_t A, B, C, D, E; in SHA1_Transform() local
67 D = ctx->state[3]; in SHA1_Transform()
70 #define SHA_F1(A, B, C, D, E, t) \ in SHA1_Transform() argument
71 E += ror27(A) + (W[t] = bswap_32(ctx->buf.w[t])) + (D ^ (B & (C ^ D))) + \ in SHA1_Transform()
76 SHA_F1(A, B, C, D, E, t + 0); in SHA1_Transform()
77 SHA_F1(E, A, B, C, D, t + 1); in SHA1_Transform()
78 SHA_F1(D, E, A, B, C, t + 2); in SHA1_Transform()
79 SHA_F1(C, D, E, A, B, t + 3); in SHA1_Transform()
80 SHA_F1(B, C, D, E, A, t + 4); in SHA1_Transform()
82 SHA_F1(A, B, C, D, E, t + 0); /* 16th one, t == 15 */ in SHA1_Transform()
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| H A D | resource_tool.c | 64 unsigned long temp, W[16], A, B, C, D, E; in sha1_process() local
98 D = ctx->state[3]; in sha1_process()
104 P (A, B, C, D, E, W[0]); in sha1_process()
105 P (E, A, B, C, D, W[1]); in sha1_process()
106 P (D, E, A, B, C, W[2]); in sha1_process()
107 P (C, D, E, A, B, W[3]); in sha1_process()
108 P (B, C, D, E, A, W[4]); in sha1_process()
109 P (A, B, C, D, E, W[5]); in sha1_process()
110 P (E, A, B, C, D, W[6]); in sha1_process()
111 P (D, E, A, B, C, W[7]); in sha1_process()
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| /rk3399_rockchip-uboot/arch/x86/include/asm/fsp/ |
| H A D | fsp_types.h | 47 #define SIGNATURE_32(A, B, C, D) \ argument
48 (SIGNATURE_16(A, B) | (SIGNATURE_16(C, D) << 16))
68 #define SIGNATURE_64(A, B, C, D, E, F, G, H) \ argument
69 (SIGNATURE_32(A, B, C, D) | ((u64)(SIGNATURE_32(E, F, G, H)) << 32))
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| /rk3399_rockchip-uboot/arch/x86/include/asm/arch-baytrail/acpi/ |
| H A D | irqroute.h | 18 PCI_DEV_PIRQ_ROUTE(SIO1_DEV, A, B, C, D), \
21 PCI_DEV_PIRQ_ROUTE(PCIE_DEV, A, B, C, D), \
23 PCI_DEV_PIRQ_ROUTE(SIO2_DEV, A, B, C, D), \
24 PCI_DEV_PIRQ_ROUTE(PCU_DEV, A, B, C, D)
27 PCIE_BRIDGE_DEV(RP, PCIE_DEV, A, B, C, D)
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| H A D | usb.asl | 19 /* Highest D state in S3 state */
22 /* Highest D state in S4 state */
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| /rk3399_rockchip-uboot/drivers/rknand/ |
| H A D | Kconfig | 16 bool "Rockchip ZFTL for rkpx30/rk3326 to support 3D/2D TLC/MLC"
21 It supports block interface(with zftl) to read and write 3D/2D TLC/MLC
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| /rk3399_rockchip-uboot/arch/x86/include/asm/arch-quark/acpi/ |
| H A D | irqroute.h | 12 PCI_DEV_PIRQ_ROUTE(QUARK_DEV_23, A, B, C, D)
15 PCIE_BRIDGE_DEV(RP, QUARK_DEV_23, A, B, C, D)
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| /rk3399_rockchip-uboot/doc/ |
| H A D | README.N1213 | 31 - I & D cache.
37 - I & D local memory (LM).
40 - Optional 1D/2D DMA engine.
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| H A D | README.arm-caches | 4 Disabling D-cache:
10 Enabling D-cache:
15 D-cache from this function. This function is called immediately
18 Guidelines for Working with D-cache:
47 - cleanup_before_linux() should flush the D-cache, invalidate I-cache, and
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| H A D | README.mips | 32 or override do_bootelf_exec() not to disable I-/D-caches, because most
38 * Probe CPU types, I-/D-cache and TLB size etc. automatically
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| /rk3399_rockchip-uboot/arch/arm/mach-snapdragon/ |
| H A D | clock-apq8016.c | 105 uintptr_t D; member
136 writel(d_val, base + regs->D); in clk_rcg_set_rate_mnd()
163 .D = SDCC_D(1),
170 .D = SDCC_D(2),
197 .D = BLSP1_UART2_APPS_D,
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| /rk3399_rockchip-uboot/drivers/bios_emulator/include/x86emu/ |
| H A D | regs.h | 98 i386_general_register A, B, C, D; member
131 #define R_DH gen.D.I8_reg.h_reg
132 #define R_DL gen.D.I8_reg.l_reg
138 #define R_DX gen.D.I16_reg.x_reg
144 #define R_EDX gen.D.I32_reg.e_reg
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| /rk3399_rockchip-uboot/arch/arm/dts/ |
| H A D | uniphier-ld6b.dtsi | 11 * LD6b consists of two silicon dies: D-chip and A-chip.
12 * The D-chip (digital chip) is the same as the PXs2 die.
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| H A D | rv1108-evb.dts | 123 39 00 15 C0 03 00 06 07 08 09 00 00 00 00 02 00 0A 0B 0C 0D 00 00 00 00
129 15 00 02 B6 2D
140 …39 00 24 E1 00 91 AE CB E6 54 FF 1e 33 43 55 4F 66 78 8B 55 9D AC C0 CF 55 E0 e8 F2 FB AA 03 0D 15…
141 … C6 E4 FD 55 11 2A 3B 49 55 54 6B 7C 8F 55 A1 AF C3 D1 55 E2 EA F3 FC AA 04 0E 15 20 AA 28 2D 32 35
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| /rk3399_rockchip-uboot/arch/nds32/cpu/n1213/ |
| H A D | start.S | 27 #define DCAC_MEM_KBF_DSET (0x07) ! D Cache sets per way
28 #define DCAC_MEM_KBF_DWAY (0x07<<3) ! D cache ways
29 #define DCAC_MEM_KBF_DSZ (0x07<<6) ! D cache line size
46 #define CR_DCAC_MEM $cr2 ! D-cache/memory config reg
327 ! Disable the D$
377 ! read $cr2(D CAC/MEM cfg. reg.) configuration
383 ! if $p0=0, then no D CAC existed
386 ! get $p0 the index of D$ block
389 ! $t1= bit width of D cache line size(DSZ)
396 andi $p1, $t0, DCAC_MEM_KBF_DWAY ! get bitfield of D way
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| /rk3399_rockchip-uboot/scripts/ |
| H A D | Makefile.build | 221 cmd_cc_o_c = $(CC) $(c_flags) -c -o $(@D)/.tmp_$(@F) $<
223 if $(OBJDUMP) -h $(@D)/.tmp_$(@F) | grep -q __ksymtab; then \
225 > $(@D)/.tmp_$(@F:.o=.ver); \
227 $(LD) $(LDFLAGS) -r -o $@ $(@D)/.tmp_$(@F) \
228 -T $(@D)/.tmp_$(@F:.o=.ver); \
229 rm -f $(@D)/.tmp_$(@F) $(@D)/.tmp_$(@F:.o=.ver); \
231 mv -f $(@D)/.tmp_$(@F) $@; \
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| /rk3399_rockchip-uboot/include/ |
| H A D | sym53c8xx.h | 529 #define DATA(D) (0x00040000 | ((D) & 0xff)) argument
530 #define MASK(D,M) (0x00040000 | (((M ^ 0xff) & 0xff) << 8ul)|((D) & 0xff)) argument
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| /rk3399_rockchip-uboot/env/ |
| H A D | Kconfig | 422 "D:P", "D:0", "D", "D:" or "D:auto" (D, P are integers. And P >= 1)
423 - "D:P": device D partition P. Error occurs if device D has no
425 - "D:0": device D.
426 - "D" or "D:": device D partition 1 if device D has partition
427 table, or the whole device D if has no partition
429 - "D:auto": first partition in device D with bootable flag set.
430 If none, first valid partition in device D. If no
431 partition table then means device D.
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| /rk3399_rockchip-uboot/board/ti/evm/ |
| H A D | MAINTAINERS | 2 M: Derald D. Woods <woods.technical@gmail.com>
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| /rk3399_rockchip-uboot/drivers/ddr/marvell/axp/ |
| H A D | ddr3_write_leveling.c | 123 dram_info->wl_val[cs][pup][D] = delay; in ddr3_write_leveling_hw()
153 [D], 2); in ddr3_write_leveling_hw()
356 [D]; in ddr3_wl_supplement()
372 [D]; in ddr3_wl_supplement()
388 [D] = delay; in ddr3_wl_supplement()
546 dram_info->wl_val[cs][pup][D] = delay; in ddr3_write_leveling_hw_reg_dimm()
557 dram_info->wl_val[cs][pup][D] = in ddr3_write_leveling_hw_reg_dimm()
589 [D], 2); in ddr3_write_leveling_hw_reg_dimm()
1271 dram_info->wl_val[cs][pup][D] = delay; in ddr3_write_leveling_single_cs()
1308 DEBUG_WL_D((u32) dram_info->wl_val[cs][pup][D], 2); in ddr3_write_leveling_single_cs()
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| /rk3399_rockchip-uboot/arch/arc/ |
| H A D | Kconfig | 33 bool "ARC 750D"
40 bool "ARC 770D"
87 when 2 D-TLB and 1 I-TLB entries index into same 2way set.
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/video/ |
| H A D | exynos_mipi_dsi.txt | 36 "set_tear_on" command, BTA requests to D-PHY automatically.
45 - RxLpdt specifies an indicator that D-PHY is under RxLpdt mode
46 - RxValid and RxLpdt specifies signal from D-PHY.
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