12d1951feSAndy Yan/* 22d1951feSAndy Yan * (C) Copyright 2016 Rockchip Electronics Co., Ltd 32d1951feSAndy Yan * 42d1951feSAndy Yan * SPDX-License-Identifier: GPL-2.0+ 52d1951feSAndy Yan */ 62d1951feSAndy Yan 72d1951feSAndy Yan/dts-v1/; 82d1951feSAndy Yan 92d1951feSAndy Yan#include "rv1108.dtsi" 104cd861d0SZhihuan He#include "rv1108-u-boot.dtsi" 11a36e90eaSZhihuan He#include "rv1108-sdram-ddr3-400.dtsi" 12395ad7c8SAndy Yan#include <dt-bindings/input/input.h> 132d1951feSAndy Yan 142d1951feSAndy Yan/ { 152d1951feSAndy Yan model = "Rockchip RV1108 Evaluation board"; 162d1951feSAndy Yan compatible = "rockchip,rv1108-evb", "rockchip,rv1108"; 172d1951feSAndy Yan 182d1951feSAndy Yan memory@60000000 { 192d1951feSAndy Yan device_type = "memory"; 202d1951feSAndy Yan reg = <0x60000000 0x08000000>; 212d1951feSAndy Yan }; 222d1951feSAndy Yan 232d1951feSAndy Yan chosen { 242d1951feSAndy Yan stdout-path = "serial2:1500000n8"; 252d1951feSAndy Yan }; 2603e886f9SWilliam Wu 27395ad7c8SAndy Yan adc-keys { 28395ad7c8SAndy Yan compatible = "adc-keys"; 29395ad7c8SAndy Yan io-channels = <&saradc 0>; 30395ad7c8SAndy Yan volup-key { 31395ad7c8SAndy Yan linux,code = <KEY_VOLUMEUP>; 32395ad7c8SAndy Yan label = "volume up"; 33395ad7c8SAndy Yan press-threshold-microvolt = <18000>; 34395ad7c8SAndy Yan }; 35395ad7c8SAndy Yan }; 36395ad7c8SAndy Yan 37151a2fa4SNickey Yang backlight: backlight { 38151a2fa4SNickey Yang compatible = "pwm-backlight"; 39151a2fa4SNickey Yang pwms = <&pwm0 0 25000 0>; 40151a2fa4SNickey Yang default-brightness-level = <200>; 41151a2fa4SNickey Yang brightness-levels = < 42151a2fa4SNickey Yang 0 1 2 3 4 5 6 7 43151a2fa4SNickey Yang 8 9 10 11 12 13 14 15 44151a2fa4SNickey Yang 16 17 18 19 20 21 22 23 45151a2fa4SNickey Yang 24 25 26 27 28 29 30 31 46151a2fa4SNickey Yang 32 33 34 35 36 37 38 39 47151a2fa4SNickey Yang 40 41 42 43 44 45 46 47 48151a2fa4SNickey Yang 48 49 50 51 52 53 54 55 49151a2fa4SNickey Yang 56 57 58 59 60 61 62 63 50151a2fa4SNickey Yang 64 65 66 67 68 69 70 71 51151a2fa4SNickey Yang 72 73 74 75 76 77 78 79 52151a2fa4SNickey Yang 80 81 82 83 84 85 86 87 53151a2fa4SNickey Yang 88 89 90 91 92 93 94 95 54151a2fa4SNickey Yang 96 97 98 99 100 101 102 103 55151a2fa4SNickey Yang 104 105 106 107 108 109 110 111 56151a2fa4SNickey Yang 112 113 114 115 116 117 118 119 57151a2fa4SNickey Yang 120 121 122 123 124 125 126 127 58151a2fa4SNickey Yang 128 129 130 131 132 133 134 135 59151a2fa4SNickey Yang 136 137 138 139 140 141 142 143 60151a2fa4SNickey Yang 144 145 146 147 148 149 150 151 61151a2fa4SNickey Yang 152 153 154 155 156 157 158 159 62151a2fa4SNickey Yang 160 161 162 163 164 165 166 167 63151a2fa4SNickey Yang 168 169 170 171 172 173 174 175 64151a2fa4SNickey Yang 176 177 178 179 180 181 182 183 65151a2fa4SNickey Yang 184 185 186 187 188 189 190 191 66151a2fa4SNickey Yang 192 193 194 195 196 197 198 199 67151a2fa4SNickey Yang 200 201 202 203 204 205 206 207 68151a2fa4SNickey Yang 208 209 210 211 212 213 214 215 69151a2fa4SNickey Yang 216 217 218 219 220 221 222 223 70151a2fa4SNickey Yang 224 225 226 227 228 229 230 231 71151a2fa4SNickey Yang 232 233 234 235 236 237 238 239 72151a2fa4SNickey Yang 240 241 242 243 244 245 246 247 73151a2fa4SNickey Yang 248 249 250 251 252 253 254 255>; 74151a2fa4SNickey Yang }; 75395ad7c8SAndy Yan 7603e886f9SWilliam Wu vcc5v0_otg: vcc5v0-otg-drv { 7703e886f9SWilliam Wu compatible = "regulator-fixed"; 7803e886f9SWilliam Wu enable-active-high; 7903e886f9SWilliam Wu regulator-name = "vcc5v0_otg"; 8003e886f9SWilliam Wu gpio = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>; 8103e886f9SWilliam Wu regulator-min-microvolt = <5000000>; 8203e886f9SWilliam Wu regulator-max-microvolt = <5000000>; 8303e886f9SWilliam Wu }; 8481681b40SDavid Wu 8581681b40SDavid Wu vcc_phy: vcc-phy-regulator { 8681681b40SDavid Wu compatible = "regulator-fixed"; 8781681b40SDavid Wu enable-active-high; 8881681b40SDavid Wu regulator-name = "vcc_phy"; 8981681b40SDavid Wu regulator-min-microvolt = <3300000>; 9081681b40SDavid Wu regulator-max-microvolt = <3300000>; 9181681b40SDavid Wu regulator-always-on; 9281681b40SDavid Wu regulator-boot-on; 9381681b40SDavid Wu }; 942d1951feSAndy Yan}; 952d1951feSAndy Yan 96151a2fa4SNickey Yang&display_subsystem { 97151a2fa4SNickey Yang status = "okay"; 98151a2fa4SNickey Yang}; 99151a2fa4SNickey Yang 100151a2fa4SNickey Yang&dsi { 101151a2fa4SNickey Yang status = "okay"; 102151a2fa4SNickey Yang 103151a2fa4SNickey Yang panel: panel@0 { 104151a2fa4SNickey Yang compatible = "simple-panel-dsi"; 105151a2fa4SNickey Yang reset-gpios = <&gpio0 RK_PC3 GPIO_ACTIVE_LOW>; 106151a2fa4SNickey Yang enable-gpios = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>; 107151a2fa4SNickey Yang prepare-delay-ms = <20>; 108151a2fa4SNickey Yang reset-delay-ms = <20>; 109151a2fa4SNickey Yang init-delay-ms = <20>; 110151a2fa4SNickey Yang enable-delay-ms = <20>; 111151a2fa4SNickey Yang reg =<0>; 112151a2fa4SNickey Yang dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 113151a2fa4SNickey Yang MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET)>; 114151a2fa4SNickey Yang dsi,format = <MIPI_DSI_FMT_RGB888>; 115151a2fa4SNickey Yang dsi,lanes = <4>; 116151a2fa4SNickey Yang status = "okay"; 117151a2fa4SNickey Yang 118151a2fa4SNickey Yang panel-init-sequence = [ 119151a2fa4SNickey Yang 39 00 06 F0 55 AA 52 08 00 120151a2fa4SNickey Yang 39 00 05 B0 0F 0F 1E 14 121151a2fa4SNickey Yang 15 00 02 B2 00 122151a2fa4SNickey Yang 15 00 02 B6 03 123151a2fa4SNickey Yang 39 00 15 C0 03 00 06 07 08 09 00 00 00 00 02 00 0A 0B 0C 0D 00 00 00 00 124151a2fa4SNickey Yang 39 00 11 C1 08 24 24 01 18 24 9F 85 08 24 24 01 18 24 95 85 125151a2fa4SNickey Yang 39 00 19 C2 03 05 1B 24 13 31 01 05 1B 24 13 31 03 05 1B 38 00 11 02 05 1B 38 00 11 126151a2fa4SNickey Yang 39 00 19 C3 02 05 1B 24 13 11 03 05 1B 24 13 11 03 05 1B 38 00 11 02 05 1B 38 00 11 127151a2fa4SNickey Yang 39 00 06 F0 55 AA 52 08 01 128151a2fa4SNickey Yang 15 00 02 B5 1E 129151a2fa4SNickey Yang 15 00 02 B6 2D 130151a2fa4SNickey Yang 15 00 02 B7 04 131151a2fa4SNickey Yang 15 00 02 B8 05 132151a2fa4SNickey Yang 15 00 02 B9 04 133151a2fa4SNickey Yang 15 00 02 BA 14 134151a2fa4SNickey Yang 15 00 02 BB 2F 135151a2fa4SNickey Yang 15 00 02 BE 12 136151a2fa4SNickey Yang 39 00 04 C2 00 35 07 137151a2fa4SNickey Yang 39 00 06 F0 55 AA 52 08 02 138151a2fa4SNickey Yang 15 00 02 C9 13 139151a2fa4SNickey Yang 39 00 04 D4 02 04 2C 140151a2fa4SNickey Yang 39 00 24 E1 00 91 AE CB E6 54 FF 1e 33 43 55 4F 66 78 8B 55 9D AC C0 CF 55 E0 e8 F2 FB AA 03 0D 15 1F AA 27 2C 31 34 141151a2fa4SNickey Yang 39 00 24 E2 00 AD C6 E4 FD 55 11 2A 3B 49 55 54 6B 7C 8F 55 A1 AF C3 D1 55 E2 EA F3 FC AA 04 0E 15 20 AA 28 2D 32 35 142151a2fa4SNickey Yang 39 00 24 E3 55 05 1E 37 4B 55 5A 64 72 7F 55 8B A3 B8 D1 A5 E4 F6 0E 23 AA 39 42 4F 59 AA 64 70 7A 86 AA 90 96 9C 9F 143151a2fa4SNickey Yang 39 00 07 8F 5A 96 3C C3 A5 69 144151a2fa4SNickey Yang 15 00 02 89 00 145151a2fa4SNickey Yang 39 00 04 8C 55 49 53 146151a2fa4SNickey Yang 15 00 02 9A 5A 147151a2fa4SNickey Yang 39 00 05 FF A5 5A 13 86 148151a2fa4SNickey Yang 39 00 03 FE 01 54 149151a2fa4SNickey Yang 15 00 02 35 00 150151a2fa4SNickey Yang 15 96 02 11 00 151151a2fa4SNickey Yang 15 32 02 29 00 152151a2fa4SNickey Yang ]; 153151a2fa4SNickey Yang 154151a2fa4SNickey Yang display-timings { 155151a2fa4SNickey Yang native-mode = <&timing_e555hbm2>; 156151a2fa4SNickey Yang 157151a2fa4SNickey Yang timing_e555hbm2: timing0 { 158151a2fa4SNickey Yang clock-frequency = <62000000>; 159151a2fa4SNickey Yang hactive = <720>; 160151a2fa4SNickey Yang vactive = <1280>; 161151a2fa4SNickey Yang hsync-len = <4>; 162151a2fa4SNickey Yang hback-porch = <20>; 163151a2fa4SNickey Yang hfront-porch = <32>; 164151a2fa4SNickey Yang vsync-len = <4>; 165151a2fa4SNickey Yang vback-porch = <15>; 166151a2fa4SNickey Yang vfront-porch = <15>; 167151a2fa4SNickey Yang hsync-active = <0>; 168151a2fa4SNickey Yang vsync-active = <0>; 169151a2fa4SNickey Yang de-active = <0>; 170151a2fa4SNickey Yang pixelclk-active = <0>; 171151a2fa4SNickey Yang }; 172151a2fa4SNickey Yang }; 173151a2fa4SNickey Yang }; 174151a2fa4SNickey Yang}; 175151a2fa4SNickey Yang 1762d1951feSAndy Yan&gmac { 1772d1951feSAndy Yan status = "okay"; 17881681b40SDavid Wu clock_in_out ="output"; 17981681b40SDavid Wu phy-supply = <&vcc_phy>; 1802d1951feSAndy Yan snps,reset-active-low; 1812d1951feSAndy Yan snps,reset-delays-us = <0 10000 1000000>; 1822d1951feSAndy Yan snps,reset-gpio = <&gpio1 RK_PC1 GPIO_ACTIVE_LOW>; 1832d1951feSAndy Yan}; 1842d1951feSAndy Yan 1851feaf21aSKever Yang&emmc { 1861feaf21aSKever Yang bus-width = <8>; 1871feaf21aSKever Yang cap-mmc-highspeed; 1881feaf21aSKever Yang supports-emmc; 1891feaf21aSKever Yang disable-wp; 1901feaf21aSKever Yang non-removable; 1911feaf21aSKever Yang num-slots = <1>; 1921feaf21aSKever Yang status = "okay"; 1931feaf21aSKever Yang}; 1941feaf21aSKever Yang 195151a2fa4SNickey Yang&mipi_dphy { 196151a2fa4SNickey Yang status = "okay"; 197151a2fa4SNickey Yang}; 198151a2fa4SNickey Yang 199151a2fa4SNickey Yang&pwm0 { 200151a2fa4SNickey Yang status = "okay"; 201151a2fa4SNickey Yang}; 202151a2fa4SNickey Yang 203151a2fa4SNickey Yang&route_dsi { 204151a2fa4SNickey Yang status = "okay"; 205151a2fa4SNickey Yang}; 206151a2fa4SNickey Yang 207dfe9d5ecSDavid Wu&saradc { 208dfe9d5ecSDavid Wu status = "okay"; 209dfe9d5ecSDavid Wu}; 210dfe9d5ecSDavid Wu 211*df7b19b0SAndy Yan&sdmmc { 212*df7b19b0SAndy Yan bus-width = <4>; 213*df7b19b0SAndy Yan cap-mmc-highspeed; 214*df7b19b0SAndy Yan cap-sd-highspeed; 215*df7b19b0SAndy Yan disable-wp; 216*df7b19b0SAndy Yan max-frequency = <150000000>; 217*df7b19b0SAndy Yan pinctrl-names = "default"; 218*df7b19b0SAndy Yan pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd &sdmmc_bus4>; 219*df7b19b0SAndy Yan status = "okay"; 220*df7b19b0SAndy Yan}; 221*df7b19b0SAndy Yan 2222d1951feSAndy Yan&sfc { 223f42a70b1SAndy Yan compatible = "rockchip,rksfc"; 2242d1951feSAndy Yan status = "okay"; 2252d1951feSAndy Yan}; 2262d1951feSAndy Yan 227e33aecafSWu Liang feng&u2phy { 228e33aecafSWu Liang feng status = "okay"; 229e33aecafSWu Liang feng}; 230e33aecafSWu Liang feng 231e33aecafSWu Liang feng&u2phy_otg { 232e33aecafSWu Liang feng status = "okay"; 233e33aecafSWu Liang feng}; 234e33aecafSWu Liang feng 235e33aecafSWu Liang feng&u2phy_host { 236e33aecafSWu Liang feng status = "okay"; 237e33aecafSWu Liang feng}; 238e33aecafSWu Liang feng 2392d1951feSAndy Yan&uart0 { 2402d1951feSAndy Yan status = "okay"; 2412d1951feSAndy Yan}; 2422d1951feSAndy Yan 2432d1951feSAndy Yan&uart1 { 2442d1951feSAndy Yan status = "okay"; 2452d1951feSAndy Yan}; 2462d1951feSAndy Yan 2472d1951feSAndy Yan&uart2 { 2482d1951feSAndy Yan status = "okay"; 2492d1951feSAndy Yan}; 25003e886f9SWilliam Wu 25103e886f9SWilliam Wu&usb20_otg { 25203e886f9SWilliam Wu vbus-supply = <&vcc5v0_otg>; 25303e886f9SWilliam Wu status = "okay"; 25403e886f9SWilliam Wu}; 25503e886f9SWilliam Wu 25603e886f9SWilliam Wu&usb_host_ehci { 25703e886f9SWilliam Wu status = "okay"; 25803e886f9SWilliam Wu}; 25903e886f9SWilliam Wu 26003e886f9SWilliam Wu&usb_host_ohci { 26103e886f9SWilliam Wu status = "okay"; 26203e886f9SWilliam Wu}; 2632fe2ebadSElaine Zhang 264151a2fa4SNickey Yang&vop { 265151a2fa4SNickey Yang status = "okay"; 266151a2fa4SNickey Yang}; 267151a2fa4SNickey Yang 2682fe2ebadSElaine Zhang&i2c0 { 2692fe2ebadSElaine Zhang i2c-scl-rising-time-ns = <275>; 2702fe2ebadSElaine Zhang i2c-scl-falling-time-ns = <16>; 2712fe2ebadSElaine Zhang clock-frequency = <200000>; 2722fe2ebadSElaine Zhang nack-retry = <1>; 2732fe2ebadSElaine Zhang status = "okay"; 2742fe2ebadSElaine Zhang 2752fe2ebadSElaine Zhang rk805: pmic@18 { 2762fe2ebadSElaine Zhang compatible = "rockchip,rk805"; 2772fe2ebadSElaine Zhang status = "okay"; 2782fe2ebadSElaine Zhang reg = <0x18>; 2792fe2ebadSElaine Zhang interrupt-parent = <&gpio1>; 2802fe2ebadSElaine Zhang interrupts = <6 IRQ_TYPE_LEVEL_LOW>; 2812fe2ebadSElaine Zhang pinctrl-names = "default"; 2822fe2ebadSElaine Zhang pinctrl-0 = <&pmic_int_l>; 2832fe2ebadSElaine Zhang rockchip,system-power-controller; 2842fe2ebadSElaine Zhang wakeup-source; 2852fe2ebadSElaine Zhang gpio-controller; 2862fe2ebadSElaine Zhang #gpio-cells = <2>; 2872fe2ebadSElaine Zhang #clock-cells = <1>; 2882fe2ebadSElaine Zhang clock-output-names = "xin32k", "rk805-clkout2"; 2892fe2ebadSElaine Zhang 2902fe2ebadSElaine Zhang pwrkey { 2912fe2ebadSElaine Zhang status = "okay"; 2922fe2ebadSElaine Zhang }; 2932fe2ebadSElaine Zhang 2942fe2ebadSElaine Zhang regulators { 2952fe2ebadSElaine Zhang vdd_arm: DCDC_REG1 { 2962fe2ebadSElaine Zhang regulator-name = "vdd_arm"; 2972fe2ebadSElaine Zhang regulator-min-microvolt = <712500>; 2982fe2ebadSElaine Zhang regulator-max-microvolt = <1450000>; 2992fe2ebadSElaine Zhang regulator-ramp-delay = <6001>; 3002fe2ebadSElaine Zhang regulator-boot-on; 3012fe2ebadSElaine Zhang regulator-always-on; 3022fe2ebadSElaine Zhang regulator-state-mem { 3032fe2ebadSElaine Zhang regulator-on-in-suspend; 3042fe2ebadSElaine Zhang regulator-suspend-microvolt = <1000000>; 3052fe2ebadSElaine Zhang }; 3062fe2ebadSElaine Zhang }; 3072fe2ebadSElaine Zhang 3082fe2ebadSElaine Zhang vdd_cam: DCDC_REG2 { 3092fe2ebadSElaine Zhang regulator-name = "vdd_cam"; 3102fe2ebadSElaine Zhang regulator-min-microvolt = <712500>; 3112fe2ebadSElaine Zhang regulator-max-microvolt = <2000000>; 3122fe2ebadSElaine Zhang regulator-ramp-delay = <6001>; 3132fe2ebadSElaine Zhang regulator-boot-on; 3142fe2ebadSElaine Zhang regulator-always-on; 3152fe2ebadSElaine Zhang regulator-state-mem { 3162fe2ebadSElaine Zhang regulator-on-in-suspend; 3172fe2ebadSElaine Zhang regulator-suspend-microvolt = <2000000>; 3182fe2ebadSElaine Zhang }; 3192fe2ebadSElaine Zhang }; 3202fe2ebadSElaine Zhang 3212fe2ebadSElaine Zhang vcc_ddr: DCDC_REG3 { 3222fe2ebadSElaine Zhang regulator-name = "vcc_ddr"; 3232fe2ebadSElaine Zhang regulator-boot-on; 3242fe2ebadSElaine Zhang regulator-always-on; 3252fe2ebadSElaine Zhang regulator-state-mem { 3262fe2ebadSElaine Zhang regulator-on-in-suspend; 3272fe2ebadSElaine Zhang }; 3282fe2ebadSElaine Zhang }; 3292fe2ebadSElaine Zhang 3302fe2ebadSElaine Zhang vcc_io: DCDC_REG4 { 3312fe2ebadSElaine Zhang regulator-name = "vcc_io"; 3322fe2ebadSElaine Zhang regulator-min-microvolt = <3300000>; 3332fe2ebadSElaine Zhang regulator-max-microvolt = <3300000>; 3342fe2ebadSElaine Zhang regulator-boot-on; 3352fe2ebadSElaine Zhang regulator-always-on; 3362fe2ebadSElaine Zhang regulator-state-mem { 3372fe2ebadSElaine Zhang regulator-on-in-suspend; 3382fe2ebadSElaine Zhang regulator-suspend-microvolt = <3300000>; 3392fe2ebadSElaine Zhang }; 3402fe2ebadSElaine Zhang }; 3412fe2ebadSElaine Zhang 3422fe2ebadSElaine Zhang vdd_10: LDO_REG1 { 3432fe2ebadSElaine Zhang regulator-name = "vdd_10"; 3442fe2ebadSElaine Zhang regulator-min-microvolt = <1000000>; 3452fe2ebadSElaine Zhang regulator-max-microvolt = <1000000>; 3462fe2ebadSElaine Zhang regulator-boot-on; 3472fe2ebadSElaine Zhang regulator-always-on; 3482fe2ebadSElaine Zhang regulator-state-mem { 3492fe2ebadSElaine Zhang regulator-on-in-suspend; 3502fe2ebadSElaine Zhang regulator-suspend-microvolt = <1000000>; 3512fe2ebadSElaine Zhang }; 3522fe2ebadSElaine Zhang }; 3532fe2ebadSElaine Zhang 3542fe2ebadSElaine Zhang vcc_18emmc: LDO_REG2 { 3552fe2ebadSElaine Zhang regulator-name = "vcc_18emmc"; 3562fe2ebadSElaine Zhang regulator-min-microvolt = <1800000>; 3572fe2ebadSElaine Zhang regulator-max-microvolt = <1800000>; 3582fe2ebadSElaine Zhang regulator-boot-on; 3592fe2ebadSElaine Zhang regulator-always-on; 3602fe2ebadSElaine Zhang regulator-state-mem { 3612fe2ebadSElaine Zhang regulator-on-in-suspend; 3622fe2ebadSElaine Zhang regulator-suspend-microvolt = <1800000>; 3632fe2ebadSElaine Zhang }; 3642fe2ebadSElaine Zhang }; 3652fe2ebadSElaine Zhang 3662fe2ebadSElaine Zhang vdd_10_pmu: LDO_REG3 { 3672fe2ebadSElaine Zhang regulator-name = "vdd_10_pmu"; 3682fe2ebadSElaine Zhang regulator-min-microvolt = <1000000>; 3692fe2ebadSElaine Zhang regulator-max-microvolt = <1000000>; 3702fe2ebadSElaine Zhang regulator-boot-on; 3712fe2ebadSElaine Zhang regulator-always-on; 3722fe2ebadSElaine Zhang regulator-state-mem { 3732fe2ebadSElaine Zhang regulator-on-in-suspend; 3742fe2ebadSElaine Zhang regulator-suspend-microvolt = <1000000>; 3752fe2ebadSElaine Zhang }; 3762fe2ebadSElaine Zhang }; 3772fe2ebadSElaine Zhang }; 3782fe2ebadSElaine Zhang }; 3792fe2ebadSElaine Zhang}; 3802fe2ebadSElaine Zhang 3812fe2ebadSElaine Zhang&pinctrl { 3822fe2ebadSElaine Zhang pmic { 3832fe2ebadSElaine Zhang pmic_int_l: pmic-int-l { 3842fe2ebadSElaine Zhang rockchip,pins = 3852fe2ebadSElaine Zhang <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_up>; 3862fe2ebadSElaine Zhang }; 3872fe2ebadSElaine Zhang }; 3882fe2ebadSElaine Zhang}; 389