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/rk3399_ARM-atf/plat/nxp/soc-lx2160a/aarch64/
H A Dlx2160a_warm_rst.S47 ldr w0, [x1, #SDRAM_CFG]
48 orr w0, w0, #SDRAM_CFG_MEM_HLT
49 str w0, [x1, #SDRAM_CFG]
51 ldr w0, [x1, #DEBUG_2]
52 and w0, w0, #DDR_DBG_2_MEM_IDLE
53 cbz w0, 2b
55 ldr w0, [x1, #DEBUG_26]
56 orr w0, w0, #DDR_DEBUG_26_BIT_12
57 orr w0, w0, #DDR_DEBUG_26_BIT_13
58 orr w0, w0, #DDR_DEBUG_26_BIT_14
[all …]
H A Dlx2160a.S212 str w0, [x1, #CORE_HOLD_OFFSET]
219 orr w2, w2, w0
248 and w0, w1, w0
419 ldr w0, [x3, #SYS_COUNTER_CNTCR_OFFSET]
420 tst w0, #SYS_COUNTER_CNTCR_EN
422 orr w0, w0, #SYS_COUNTER_CNTCR_EN
423 str w0, [x3, #SYS_COUNTER_CNTCR_OFFSET]
536 mov w0, #0x00000000
537 str w0, [x2, #RSTCNTL_OFFSET]
540 mov w0, #SW_RST_REQ_INIT
[all …]
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/pmu/
H A Dplat_pmu_macros.S90 ldr w0, [x5, #PMU_SFT_CON]
91 orr w0, w0, #DDRCTL0_C_SYSREQ_CFG
92 orr w0, w0, #DDRCTL1_C_SYSREQ_CFG
93 str w0, [x5, #PMU_SFT_CON]
111 lsl w0, w8, #4
112 orr w0, w0, #0x00300000
113 str w0, [x5, #CRU_CLKSEL_CON6]
117 ldr w0, [x5, #PMU_SFT_CON]
118 bic w0, w0, #DDRCTL0_C_SYSREQ_CFG
119 bic w0, w0, #DDRCTL1_C_SYSREQ_CFG
[all …]
/rk3399_ARM-atf/plat/nxp/common/aarch64/
H A Dls_helpers.S99 bfxil w1, w0, #8, #8
101 bfxil w2, w0, #0, #8
103 mov w0, wzr
111 mov w0, #CORES_PER_CLUSTER
112 mul w1, w1, w0
115 lsl w0, w2, w1
139 bfxil w1, w0, #8, #8 /* extract cluster */
140 bfxil w2, w0, #0, #8 /* extract cpu # */
142 mov w0, #-1
150 mov w0, #CORES_PER_CLUSTER
[all …]
/rk3399_ARM-atf/plat/nxp/soc-ls1028a/aarch64/
H A Dls1028a.S141 and w0, w1, w0
183 str w0, [x1, #CORE_HOLD_OFFSET]
188 orr w2, w2, w0
387 ldr w0, [x3, #SYS_COUNTER_CNTCR_OFFSET]
388 tst w0, #SYS_COUNTER_CNTCR_EN
390 orr w0, w0, #SYS_COUNTER_CNTCR_EN
391 str w0, [x3, #SYS_COUNTER_CNTCR_OFFSET]
586 cmp w1, w0
591 str w0, [x3, #PMU_CLAINACTSETR_OFFSET]
597 cmp w1, w0
[all …]
/rk3399_ARM-atf/plat/marvell/armada/a3k/common/aarch64/
H A Da3700_clock.S27 ldr w0, [x0]
28 tst w0, #MVEBU_XTAL_MODE_MASK
30 mov w0, #25
33 mov w0, #40
/rk3399_ARM-atf/plat/qti/common/src/aarch64/
H A Dqti_uart_console.S55 cmp w0, #0xA
60 mov w0, #0xD
64 str w0, [x1, #GENI_TX_FIFOn_REG]
65 mov w0, #0xA
78 str w0, [x1, #GENI_TX_FIFOn_REG]
100 mov w0, #0
/rk3399_ARM-atf/docs/components/
H A Dven-el3-debugfs.rst89 int32_t w0 == SMC_OK on success
91 w0 == DEBUGFS_E_INVALID_PARAMS if mount operation failed
127 int32_t w0 == SMC_OK on success
129 w0 == DEBUGFS_E_INVALID_PARAMS if open operation failed
155 int32_t w0 == SMC_OK on success
157 w0 == DEBUGFS_E_INVALID_PARAMS if close operation failed
186 int32_t w0 == SMC_OK on success
188 w0 == DEBUGFS_E_INVALID_PARAMS if read operation failed
225 int32_t w0 == SMC_OK on success
227 w0 == DEBUGFS_E_INVALID_PARAMS if seek operation failed
[all …]
/rk3399_ARM-atf/plat/st/stm32mp2/aarch64/
H A Dstm32mp2_helper.S94 ldr w0, [x1]
95 orr w0, w0, w2
96 str w0, [x1]
98 ldr w0, [x1]
99 tst w0, #DEBUG_UART_RST_BIT
101 bic w0, w0, #DEBUG_UART_RST_BIT
102 str w0, [x1]
104 ldr w0, [x1]
105 tst w0, #DEBUG_UART_RST_BIT
/rk3399_ARM-atf/plat/nxp/soc-ls1088a/aarch64/
H A Dls1088a.S225 str w0, [x1, #CORE_HOLD_OFFSET]
232 orr w2, w2, w0
259 and w0, w1, w0
430 ldr w0, [x3, #SYS_COUNTER_CNTCR_OFFSET]
431 tst w0, #SYS_COUNTER_CNTCR_EN
433 orr w0, w0, #SYS_COUNTER_CNTCR_EN
434 str w0, [x3, #SYS_COUNTER_CNTCR_OFFSET]
644 str w0, [x3, #PMU_CLAINACTSETR_OFFSET]
657 str w0, [x3, x2]
661 str w0, [x3, x2]
[all …]
/rk3399_ARM-atf/plat/imx/common/
H A Dimx_uart_console.S43 mov w0, #1
52 cmp w0, #0xA
64 str w0, [x1, #UTXD]
67 mov w0, #-1
79 and w0, w1, #URXD_RX_DATA
83 mov w0, #-1
H A Dlpuart_console.S37 mov w0, #1
45 cmp w0, #0xA
57 str w0, [x1, #DATA]
60 mov w0, #-1
70 mov w0, #-1
/rk3399_ARM-atf/drivers/console/aarch64/
H A Dskeleton_console.S70 mov w0, #0
100 mov w0, #-1
138 mov w0, #ERROR_NO_PENDING_CHAR
143 mov w0, #-2 /* may pick error codes between -2 and -127 */
/rk3399_ARM-atf/plat/mediatek/drivers/uart/
H A D8250_console.S87 mov w0, #1
90 mov w0, wzr
108 cmp w0, #0xA
122 str w0, [x1, #UART_THR]
125 mov w0, #-1
144 ldr w0, [x0, #UART_RBR]
147 mov w0, #-1
/rk3399_ARM-atf/plat/rpi/common/aarch64/
H A Dplat_helpers.S70 cset w0, eq
143 cbz w0, 1f
233 cmp w0, #0x80 /* Cortex-A72 (RPi4) is 0xd08, A53 is 0xd03 */
234 mov w0, #3
235 csinc w0, w0, w0, ne
250 cmp w0, #4
/rk3399_ARM-atf/drivers/marvell/uart/
H A Da3700_console.S109 mov w0, #1
112 mov w0, #0
164 cmp w0, #0xA
179 str w0, [x1, #UART_TX_REG]
182 mov w0, #-1
217 ldr w0, [x0, #UART_RX_REG]
218 and w0, w0, #0xff
221 mov w0, #ERROR_NO_PENDING_CHAR
/rk3399_ARM-atf/plat/xilinx/zynqmp/aarch64/
H A Dzynqmp_helpers.S33 mov w0, #(IRQ_BYP_DIS_GRP1 | FIQ_BYP_DIS_GRP1)
34 orr w0, w0, #(IRQ_BYP_DIS_GRP0 | FIQ_BYP_DIS_GRP0)
35 str w0, [x1, #GICC_CTLR]
/rk3399_ARM-atf/plat/renesas/common/aarch64/
H A Dplat_helpers.S146 bic w0, w0, #TCPAC_BIT
147 bic w0, w0, #TTA_BIT
148 bic w0, w0, #TFP_BIT
236 cmp w0, w1
342 ldr w0, [x0]
343 ubfx w0, w0, 8, 8
345 cmp w0, #0x4F
/rk3399_ARM-atf/drivers/cadence/uart/aarch64/
H A Dcdns_console.S47 mov w0, #1
50 mov w0, wzr
105 cmp w0, #0xA
117 str w0, [x1, #R_UART_TX]
160 mov w0, w1
163 mov w0, #ERROR_NO_PENDING_CHAR
/rk3399_ARM-atf/drivers/amlogic/console/aarch64/
H A Dmeson_console.S93 cmp w0, #0
123 mov w0, #1
126 mov w0, wzr
165 cmp w0, #0xA
177 str w0, [x1, #MESON_WFIFO_OFFSET]
219 ldr w0, [x0, #MESON_RFIFO_OFFSET]
222 mov w0, #ERROR_NO_PENDING_CHAR
/rk3399_ARM-atf/plat/socionext/uniphier/
H A Duniphier_console.S26 str w0, [x1, #UNIPHIER_UART_TX]
44 ldr w0, [x0, #UNIPHIER_UART_RX]
47 0: mov w0, #ERROR_NO_PENDING_CHAR
/rk3399_ARM-atf/plat/nvidia/tegra/drivers/spe/
H A Dshared_console.S77 mov w0, wzr
96 cmp w0, #0xA
112 mov w2, w0
120 mov w0, #-1
150 mov w0, #-1
/rk3399_ARM-atf/lib/romlib/
H A Dinit.s12 cmp w0, #1
13 mov w0, #0
35 mov w0, #1
/rk3399_ARM-atf/drivers/arm/pl011/aarch64/
H A Dpl011_console.S71 mov w0, #1
74 mov w0, wzr
129 cmp w0, #0xA
141 str w0, [x1, #UARTDR]
184 mov w0, w1
187 mov w0, #ERROR_NO_PENDING_CHAR
/rk3399_ARM-atf/plat/nxp/soc-ls1046a/aarch64/
H A Dls1046a.S93 rbit w2, w0
108 orr w3, w3, w0
189 and w0, w2, w0
209 rev w0, w1
210 str w0, [x2, x3]
307 rev w0, w1
335 rev w0, w1
390 orr w1, w0, w1
513 ldr w0, [x1, #GICC_IAR_OFFSET]
516 str w0, [x1, #GICC_EOIR_OFFSET]
[all …]

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