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/rk3399_ARM-atf/tools/cot_dt2c/cot_dt2c/
H A Dcot_dt2c.py7 import sys
24 if (len(sys.argv) < 2):
25 print("usage: python3 " + sys.argv[0] + " [dtsi file path] [optional output c file path]")
27 if len(sys.argv) == 3:
28 generateMain(sys.argv[1], sys.argv[2])
29 if len(sys.argv) == 2:
30 validateMain(sys.argv[1])
H A D__init__.py10 import sys
12 if sys.version_info >= (3, 8):
H A Ddt_validator.py7 import sys
126 if (len(sys.argv) < 2):
127 print("usage: python3 " + sys.argv[0] + " [dtsi file path] or [dtsi folder path]")
129 if len(sys.argv) == 2:
130 dtValidatorMain(sys.argv[1])
/rk3399_ARM-atf/drivers/nxp/console/
H A Dconsole_pl011.c23 struct sysinfo sys; in plat_console_init() local
26 zeromem(&sys, sizeof(sys)); in plat_console_init()
27 if (get_clocks(&sys)) { in plat_console_init()
33 (sys.freq_platform/uart_clk_div), in plat_console_init()
H A Dconsole_16550.c22 struct sysinfo sys; in plat_console_init() local
25 zeromem(&sys, sizeof(sys)); in plat_console_init()
26 if (get_clocks(&sys)) { in plat_console_init()
31 (sys.freq_platform/uart_clk_div), in plat_console_init()
/rk3399_ARM-atf/plat/nxp/soc-ls1046a/ls1046aqds/
H A Dddr_init.c61 struct sysinfo sys; in init_ddr() local
64 zeromem(&sys, sizeof(sys)); in init_ddr()
65 if (get_clocks(&sys)) { in init_ddr()
69 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
70 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
71 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1); in init_ddr()
76 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
/rk3399_ARM-atf/plat/nxp/soc-ls1088a/ls1088aqds/
H A Dddr_init.c61 struct sysinfo sys; in init_ddr() local
64 zeromem(&sys, sizeof(sys)); in init_ddr()
65 get_clocks(&sys); in init_ddr()
66 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
67 debug("DDR PLL %lu\n", sys.freq_ddr_pll0); in init_ddr()
72 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
/rk3399_ARM-atf/plat/nxp/soc-ls1088a/ls1088ardb/
H A Dddr_init.c62 struct sysinfo sys; in init_ddr() local
65 zeromem(&sys, sizeof(sys)); in init_ddr()
66 get_clocks(&sys); in init_ddr()
67 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
68 debug("DDR PLL %lu\n", sys.freq_ddr_pll0); in init_ddr()
73 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
/rk3399_ARM-atf/drivers/nxp/dcfg/
H A Ddcfg.c87 int get_clocks(struct sysinfo *sys) in get_clocks() argument
94 sys->freq_platform = sysclk; in get_clocks()
95 sys->freq_ddr_pll0 = ddrclk; in get_clocks()
96 sys->freq_ddr_pll1 = ddrclk; in get_clocks()
98 sys->freq_platform *= (gur_in32(rcwsr0) >> in get_clocks()
102 sys->freq_platform /= dcfg_init_info->nxp_plat_clk_divider; in get_clocks()
104 sys->freq_ddr_pll0 *= (gur_in32(rcwsr0) >> in get_clocks()
107 sys->freq_ddr_pll1 *= (gur_in32(rcwsr0) >> in get_clocks()
110 if (sys->freq_platform == 0) { in get_clocks()
/rk3399_ARM-atf/plat/nxp/soc-ls1043a/ls1043ardb/
H A Dddr_init.c138 struct sysinfo sys;
141 zeromem(&sys, sizeof(sys));
142 get_clocks(&sys);
143 debug("platform clock %lu\n", sys.freq_platform);
144 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0);
145 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1);
150 info.clk = get_ddr_freq(&sys, 0);
/rk3399_ARM-atf/plat/nxp/soc-lx2160a/lx2160ardb/
H A Dddr_init.c169 struct sysinfo sys; in init_ddr() local
172 zeromem(&sys, sizeof(sys)); in init_ddr()
173 if (get_clocks(&sys) != 0) { in init_ddr()
177 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
178 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
179 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1); in init_ddr()
190 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
194 info.clk = get_ddr_freq(&sys, 1); in init_ddr()
/rk3399_ARM-atf/plat/nxp/soc-ls1046a/ls1046afrwy/
H A Dddr_init.c148 struct sysinfo sys; in init_ddr() local
151 zeromem(&sys, sizeof(sys)); in init_ddr()
152 if (get_clocks(&sys)) { in init_ddr()
156 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
157 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
158 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1); in init_ddr()
163 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
/rk3399_ARM-atf/plat/nxp/soc-ls1028a/ls1028ardb/
H A Dddr_init.c164 struct sysinfo sys; in init_ddr() local
167 zeromem(&sys, sizeof(sys)); in init_ddr()
168 get_clocks(&sys); in init_ddr()
169 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
170 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
175 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
/rk3399_ARM-atf/lib/romlib/
H A Dromlib_generator.py16 import sys
278 if len(sys.argv) < 2 or sys.argv[1] not in APPS:
279 print("usage: romlib_generator.py [%s] [args]" % "|".join(APPS.keys()), file=sys.stderr)
280 sys.exit(1)
282 APP = APPS[sys.argv[1]]("romlib_generator.py " + sys.argv[1])
283 APP.parse_arguments(sys.argv[2:])
286 sys.exit(0)
288 print(file_not_found_error, file=sys.stderr)
290 print(called_process_error.output, file=sys.stderr)
292 sys.exit(1)
/rk3399_ARM-atf/drivers/nxp/ddr/nxp-ddr/
H A Dutility.c42 unsigned long get_ddr_freq(struct sysinfo *sys, int ctrl_num) in get_ddr_freq() argument
44 if (sys->freq_ddr_pll0 == 0) { in get_ddr_freq()
45 get_clocks(sys); in get_ddr_freq()
50 return sys->freq_ddr_pll0; in get_ddr_freq()
52 return sys->freq_ddr_pll0; in get_ddr_freq()
54 return sys->freq_ddr_pll1; in get_ddr_freq()
/rk3399_ARM-atf/plat/nxp/soc-ls1046a/ls1046ardb/
H A Dddr_init.c237 struct sysinfo sys; in init_ddr() local
240 zeromem(&sys, sizeof(sys)); in init_ddr()
241 if (get_clocks(&sys)) { in init_ddr()
245 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
246 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
247 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1); in init_ddr()
252 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
/rk3399_ARM-atf/tools/cot_dt2c/tests/
H A Dtest_util.py8 import sys
14 return os.path.dirname(os.path.realpath(sys.argv[0]))
/rk3399_ARM-atf/plat/nxp/soc-lx2160a/lx2160aqds/
H A Dddr_init.c304 struct sysinfo sys; in init_ddr() local
307 zeromem(&sys, sizeof(sys)); in init_ddr()
308 if (get_clocks(&sys) == 1) { in init_ddr()
312 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
313 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
314 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1); in init_ddr()
325 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
329 info.clk = get_ddr_freq(&sys, 1); in init_ddr()
/rk3399_ARM-atf/plat/nxp/soc-lx2160a/lx2162aqds/
H A Dddr_init.c304 struct sysinfo sys; in init_ddr() local
307 zeromem(&sys, sizeof(sys)); in init_ddr()
308 if (get_clocks(&sys) != 0) { in init_ddr()
312 debug("platform clock %lu\n", sys.freq_platform); in init_ddr()
313 debug("DDR PLL1 %lu\n", sys.freq_ddr_pll0); in init_ddr()
314 debug("DDR PLL2 %lu\n", sys.freq_ddr_pll1); in init_ddr()
325 info.clk = get_ddr_freq(&sys, 0); in init_ddr()
329 info.clk = get_ddr_freq(&sys, 1); in init_ddr()
/rk3399_ARM-atf/tools/sptool/
H A Dsp_mk_generator.py56 import sys
343 def init_sp_actions(sys): argument
346 args["sp_gen_mk"] = os.path.abspath(sys.argv[1])
347 sp_layout_file = os.path.abspath(sys.argv[2])
349 args["out_dir"] = os.path.abspath(sys.argv[3])
350 args["dualroot"] = sys.argv[4] == "dualroot"
351 args["fconf_fragment"] = os.path.abspath(sys.argv[5])
366 args, sp_layout = init_sp_actions(sys)
H A Dsptool.py20 import sys
145 sys.exit(Main())
/rk3399_ARM-atf/include/drivers/nxp/ddr/
H A Dutility.h18 unsigned long get_ddr_freq(struct sysinfo *sys, int ctrl_num);
/rk3399_ARM-atf/include/drivers/nxp/dcfg/
H A Ddcfg.h84 int get_clocks(struct sysinfo *sys);
/rk3399_ARM-atf/lib/compiler-rt/builtins/
H A Dint_lib.h83 #if defined(__has_include) && __has_include(<sys/limits.h>)
/rk3399_ARM-atf/fdts/
H A Dmorello-soc.dts383 sys-thermal {
389 sys_alarm: sys-alarm {
394 sys_shutdown: sys-shutdown {

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