| /rk3399_ARM-atf/drivers/nxp/clk/s32cc/ |
| H A D | s32cc_clk_drv.c | 462 const struct s32cc_clkmux *mux; in enable_pll() local
473 mux = get_pll_mux(pll); in enable_pll()
474 if (mux == NULL) { in enable_pll()
478 if (pll->instance != mux->module) { in enable_pll()
489 switch (mux->source_id) { in enable_pll()
614 static int cgm_mux_clk_config(uintptr_t cgm_addr, uint32_t mux, uint32_t source, in cgm_mux_clk_config() argument
619 css = mmio_read_32(CGM_MUXn_CSS(cgm_addr, mux)); in cgm_mux_clk_config()
629 while ((mmio_read_32(CGM_MUXn_CSS(cgm_addr, mux)) & in cgm_mux_clk_config()
633 csc = mmio_read_32(CGM_MUXn_CSC(cgm_addr, mux)); in cgm_mux_clk_config()
646 mmio_write_32(CGM_MUXn_CSC(cgm_addr, mux), csc); in cgm_mux_clk_config()
[all …]
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| /rk3399_ARM-atf/plat/imx/common/include/sci/svc/pad/ |
| H A D | sci_pad_api.h | 215 uint8_t mux, sc_pad_config_t config, sc_pad_iso_t iso);
236 uint8_t *mux, sc_pad_config_t *config,
338 sc_err_t sc_pad_set_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t mux,
364 sc_err_t sc_pad_get_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t *mux,
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| /rk3399_ARM-atf/plat/imx/common/sci/svc/pad/ |
| H A D | pad_rpc_clnt.c | 32 uint8_t mux, sc_pad_config_t config, sc_pad_iso_t iso) in sc_pad_set_mux() argument
41 RPC_U8(&msg, 2U) = (uint8_t)mux; in sc_pad_set_mux()
53 uint8_t *mux, sc_pad_config_t *config, in sc_pad_get_mux() argument
68 if (mux != NULL) { in sc_pad_get_mux()
69 *mux = RPC_U8(&msg, 0U); in sc_pad_get_mux()
161 sc_err_t sc_pad_set_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t mux, in sc_pad_set_all() argument
173 RPC_U8(&msg, 6U) = (uint8_t)mux; in sc_pad_set_all()
185 sc_err_t sc_pad_get_all(sc_ipc_t ipc, sc_pad_t pad, uint8_t *mux, in sc_pad_get_all() argument
205 if (mux != NULL) { in sc_pad_get_all()
206 *mux = RPC_U8(&msg, 4U); in sc_pad_get_all()
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| /rk3399_ARM-atf/drivers/st/clk/ |
| H A D | clk-stm32-core.c | 281 const struct mux_cfg *mux = parents->mux; in clk_mux_set_parent() local
282 uintptr_t address = priv->base + mux->offset; in clk_mux_set_parent()
286 mask = MASK_WIDTH_SHIFT(mux->width, mux->shift); in clk_mux_set_parent()
288 mmio_clrsetbits_32(address, mask, (sel << mux->shift) & mask); in clk_mux_set_parent()
290 if (mux->bitrdy == MUX_NO_BIT_RDY) { in clk_mux_set_parent()
296 mask = BIT(mux->bitrdy); in clk_mux_set_parent()
359 const struct mux_cfg *mux; in clk_mux_get_parent() local
367 mux = parent->mux; in clk_mux_get_parent()
369 mask = MASK_WIDTH_SHIFT(mux->width, mux->shift); in clk_mux_get_parent()
371 return (mmio_read_32(priv->base + mux->offset) & mask) >> mux->shift; in clk_mux_get_parent()
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| H A D | clk-stm32-core.h | 39 struct mux_cfg *mux; member
133 #define MUX(mux) ((mux) | MUX_FLAG) argument
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| H A D | stm32mp1_clk.c | 216 const struct mux_cfg *mux; in clk_mux_get_parent() local
223 mux = &priv->parents[mux_id]; in clk_mux_get_parent()
225 mask = MASK_WIDTH_SHIFT(mux->width, mux->shift); in clk_mux_get_parent()
227 return (mmio_read_32(priv->base + mux->offset) & mask) >> mux->shift; in clk_mux_get_parent()
232 const struct mux_cfg *mux = &priv->parents[pid]; in clk_mux_set_parent() local
233 uintptr_t address = priv->base + mux->offset; in clk_mux_set_parent()
237 mask = MASK_WIDTH_SHIFT(mux->width, mux->shift); in clk_mux_set_parent()
239 mmio_clrsetbits_32(address, mask, (sel << mux->shift) & mask); in clk_mux_set_parent()
241 if (mux->bitrdy == MUX_NO_BIT_RDY) { in clk_mux_set_parent()
247 mask = BIT(mux->bitrdy); in clk_mux_set_parent()
[all …]
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| H A D | clk-stm32mp13.c | 382 .mux = &(struct mux_cfg) {\
393 .mux = &(struct mux_cfg) {\
1080 int mux = (data & MUX_ID_MASK) >> MUX_ID_SHIFT; in stm32_clk_configure_mux() local
1083 return clk_mux_set_parent(priv, mux, sel); in stm32_clk_configure_mux()
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| H A D | clk-stm32mp2.c | 326 .mux = &(struct mux_cfg) {\
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| /rk3399_ARM-atf/docs/ |
| H A D | change-log.md | 2958 …- configure each GPIO mux as secure for STM32MP2 ([179a130](https://review.trustedfirmware.org/plu…
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