462 	const struct s32cc_clkmux *mux;  in enable_pll()  local
473 	mux = get_pll_mux(pll);  in enable_pll()
474 	if (mux == NULL) {  in enable_pll()
478 	if (pll->instance != mux->module) {  in enable_pll()
489 	switch (mux->source_id) {  in enable_pll()
614 static int cgm_mux_clk_config(uintptr_t cgm_addr, uint32_t mux, uint32_t source,  in cgm_mux_clk_config()  argument
619 	css = mmio_read_32(CGM_MUXn_CSS(cgm_addr, mux));  in cgm_mux_clk_config()
629 	while ((mmio_read_32(CGM_MUXn_CSS(cgm_addr, mux)) &  in cgm_mux_clk_config()
633 	csc = mmio_read_32(CGM_MUXn_CSC(cgm_addr, mux));  in cgm_mux_clk_config()
646 	mmio_write_32(CGM_MUXn_CSC(cgm_addr, mux), csc);  in cgm_mux_clk_config()
649 	while ((mmio_read_32(CGM_MUXn_CSC(cgm_addr, mux)) &  in cgm_mux_clk_config()
654 	while ((mmio_read_32(CGM_MUXn_CSS(cgm_addr, mux)) &  in cgm_mux_clk_config()
662 	css = mmio_read_32(CGM_MUXn_CSS(cgm_addr, mux));  in cgm_mux_clk_config()
670 		      mux, source, cgm_addr);  in cgm_mux_clk_config()
679 		      mux, cgm_addr);  in cgm_mux_clk_config()
685 static int enable_cgm_mux(const struct s32cc_clkmux *mux,  in enable_cgm_mux()  argument
692 	ret = get_base_addr(mux->module, drv, &cgm_addr);  in enable_cgm_mux()
697 	mux_hw_clk = (uint32_t)S32CC_CLK_ID(mux->source_id);  in enable_cgm_mux()
699 	return cgm_mux_clk_config(cgm_addr, mux->index,  in enable_cgm_mux()
705 	const struct s32cc_clkmux *mux = s32cc_obj2clkmux(module);  in get_mux_parent()  local
708 	if (mux == NULL) {  in get_mux_parent()
712 	clk = s32cc_get_arch_clk(mux->source_id);  in get_mux_parent()
715 		      mux->source_id, mux->index);  in get_mux_parent()
726 	const struct s32cc_clkmux *mux = s32cc_obj2clkmux(module);  in enable_mux()  local
736 	if (mux == NULL) {  in enable_mux()
740 	clk = s32cc_get_arch_clk(mux->source_id);  in enable_mux()
743 		      mux->source_id, mux->index);  in enable_mux()
747 	switch (mux->module) {  in enable_mux()
754 		ret = enable_cgm_mux(mux, drv);  in enable_mux()
757 		ret = enable_cgm_mux(mux, drv);  in enable_mux()
760 		ret = enable_cgm_mux(mux, drv);  in enable_mux()
763 		ERROR("Unknown mux parent type: %d\n", mux->module);  in enable_mux()
1093 static void cgm_mux_div_config(uintptr_t cgm_addr, uint32_t mux,  in cgm_mux_div_config()  argument
1097 	uint32_t dc_val = mmio_read_32(MC_CGM_MUXn_DCm(cgm_addr, mux, div_index));  in cgm_mux_div_config()
1106 	mmio_write_32(MC_CGM_MUXn_DCm(cgm_addr, mux, div_index),  in cgm_mux_div_config()
1111 		updstat = mmio_read_32(MC_CGM_MUXn_DIV_UPD_STAT(cgm_addr, mux));  in cgm_mux_div_config()
1153 	const struct s32cc_clkmux *mux;  in enable_cgm_div()  local
1176 	mux = get_cgm_div_mux(cgm_div);  in enable_cgm_div()
1177 	if (mux == NULL) {  in enable_cgm_div()
1181 	ret = get_base_addr(mux->module, drv, &cgm_addr);  in enable_cgm_div()
1184 		      mux->module);  in enable_cgm_div()
1192 		      mux->index, cgm_addr);  in enable_cgm_div()
1202 		mux->index, cgm_div->index, (unsigned long)pfreq,  in enable_cgm_div()
1207 	cgm_mux_div_config(cgm_addr, mux->index, dc - 1U, cgm_div->index);  in enable_cgm_div()
1234 static inline bool is_cgm_div_enabled(uintptr_t cgm_addr, uint32_t mux,  in is_cgm_div_enabled()  argument
1239 	dc_val = mmio_read_32(MC_CGM_MUXn_DCm(cgm_addr, mux, div_index));  in is_cgm_div_enabled()
1244 static unsigned long calc_cgm_div_freq(uintptr_t cgm_addr, uint32_t mux,  in calc_cgm_div_freq()  argument
1250 	dc_val = mmio_read_32(MC_CGM_MUXn_DCm(cgm_addr, mux, div_index));  in calc_cgm_div_freq()
1261 	const struct s32cc_clkmux *mux;  in get_cgm_div_freq()  local
1277 	mux = get_cgm_div_mux(cgm_div);  in get_cgm_div_freq()
1278 	if (mux == NULL) {  in get_cgm_div_freq()
1282 	ret = get_base_addr(mux->module, drv, &cgm_addr);  in get_cgm_div_freq()
1285 		      mux->module);  in get_cgm_div_freq()
1289 	if (!is_cgm_div_enabled(cgm_addr, mux->index, cgm_div->index)) {  in get_cgm_div_freq()
1297 		      mux->index, cgm_addr);  in get_cgm_div_freq()
1301 	*rate = calc_cgm_div_freq(cgm_addr, mux->index, cgm_div->index, pfreq);  in get_cgm_div_freq()
1803 	const struct s32cc_clkmux *mux = s32cc_obj2clkmux(module);  in set_mux_freq()  local
1804 	const struct s32cc_clk *clk = s32cc_get_arch_clk(mux->source_id);  in set_mux_freq()
1814 		      mux->index, mux->source_id);  in set_mux_freq()
1825 	const struct s32cc_clkmux *mux = s32cc_obj2clkmux(module);  in get_mux_freq()  local
1826 	const struct s32cc_clk *clk = s32cc_get_arch_clk(mux->source_id);  in get_mux_freq()
1837 		      mux->index, mux->source_id);  in get_mux_freq()
2217 	struct s32cc_clkmux *mux;  in s32cc_clk_set_parent()  local
2235 	mux = s32cc_clk2mux(clk);  in s32cc_clk_set_parent()
2236 	if (mux == NULL) {  in s32cc_clk_set_parent()
2241 	for (i = 0; i < mux->nclks; i++) {  in s32cc_clk_set_parent()
2242 		if (mux->clkids[i] == parent_id) {  in s32cc_clk_set_parent()
2254 	mux->source_id = parent_id;  in s32cc_clk_set_parent()